From: Daniel Baluta <daniel.baluta@nxp.com>
To: daniel.baluta@nxp.com, shawnguo@kernel.org
Cc: aisheng.dong@nxp.com, anson.huang@nxp.com,
devicetree@vger.kernel.org, festevam@gmail.com,
kernel@pengutronix.de, leonard.crestez@nxp.com,
linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
linux-kernel@vger.kernel.org, m.felsch@pengutronix.de,
mark.rutland@arm.com, paul.olaru@nxp.com, peng.fan@nxp.com,
robh+dt@kernel.org, shengjiu.wang@nxp.com,
sound-open-firmware@alsa-project.org,
pierre-louis.bossart@linux.intel.com, l.stach@pengutronix.de
Subject: [PATCH v3 5/5] dt-bindings: dsp: fsl: Add DSP core binding support
Date: Wed, 7 Aug 2019 19:42:58 +0300 [thread overview]
Message-ID: <20190807164258.8306-6-daniel.baluta@nxp.com> (raw)
In-Reply-To: <20190807164258.8306-1-daniel.baluta@nxp.com>
This describes the DSP device tree node.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/dsp/fsl,dsp.yaml | 88 +++++++++++++++++++
1 file changed, 88 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
new file mode 100644
index 000000000000..24b9fd64e3eb
--- /dev/null
+++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8 DSP core
+
+maintainers:
+ - Daniel Baluta <daniel.baluta@nxp.com>
+
+description: |
+ Some boards from i.MX8 family contain a DSP core used for
+ advanced pre- and post- audio processing.
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx8qxp-dsp
+
+ reg:
+ description: Should contain register location and length
+
+ clocks:
+ items:
+ - description: ipg clock
+ - description: ocram clock
+ - description: core clock
+
+ clock-names:
+ items:
+ - const: ipg
+ - const: ocram
+ - const: core
+
+ power-domains:
+ description:
+ List of phandle and PM domain specifier as documented in
+ Documentation/devicetree/bindings/power/power_domain.txt
+ maxItems: 4
+
+ mboxes:
+ description:
+ List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB
+ (see mailbox/fsl,mu.txt)
+ maxItems: 4
+
+ mbox-names:
+ items:
+ - const: txdb0
+ - const: txdb1
+ - const: rxdb0
+ - const: rxdb1
+
+ memory-region:
+ description:
+ phandle to a node describing reserved memory (System RAM memory)
+ used by DSP (see bindings/reserved-memory/reserved-memory.txt)
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - power-domains
+ - mboxes
+ - mbox-names
+ - memory-region
+
+examples:
+ - |
+ #include <dt-bindings/firmware/imx/rsrc.h>
+ #include <dt-bindings/clock/imx8-clock.h>
+ dsp@596e8000 {
+ compatbile = "fsl,imx8qxp-dsp";
+ reg = <0x596e8000 0x88000>;
+ clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>,
+ <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
+ <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
+ clock-names = "ipg", "ocram", "core";
+ power-domains = <&pd IMX_SC_R_MU_13A>,
+ <&pd IMX_SC_R_MU_13B>,
+ <&pd IMX_SC_R_DSP>,
+ <&pd IMX_SC_R_DSP_RAM>;
+ mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
+ mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
+ };
--
2.17.1
prev parent reply other threads:[~2019-08-07 16:43 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-07 16:42 [PATCH v3 0/5] Add DSP node for i.MX8QXP board to be used by DSP SOF driver Daniel Baluta
2019-08-07 16:42 ` [PATCH v3 1/5] ASoC: SOF: Add OF DSP device support Daniel Baluta
2019-08-07 16:42 ` [PATCH v3 2/5] ASoC: SOF: imx: Add i.MX8 HW support Daniel Baluta
2019-08-07 16:42 ` [PATCH v3 3/5] ASoC: SOF: topology: Add dummy support for i.MX8 DAIs Daniel Baluta
2019-08-07 16:42 ` [PATCH v3 4/5] arm64: dts: imx8qxp: Add DSP DT node Daniel Baluta
2019-08-19 13:44 ` Shawn Guo
2019-08-07 16:42 ` Daniel Baluta [this message]
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