[GIT PULL] RISC-V updates for v5.3-rc4

From: Paul Walmsley <paul.walmsley@sifive.com>
To: torvalds@linux-foundation.org
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: [GIT PULL] RISC-V updates for v5.3-rc4
Date: Sat, 10 Aug 2019 14:51:56 -0700 (PDT)	[thread overview]
Message-ID: <alpine.DEB.2.21.9999.1908101451050.22177@viisi.sifive.com> (raw)

Linus,

The following changes since commit e21a712a9685488f5ce80495b37b9fdbe96c230d:

  Linux 5.3-rc3 (2019-08-04 18:40:12 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.3-rc4

for you to fetch changes up to b390e0bfd2996f1215231395f4e25a4c011eeaf9:

  dt-bindings: riscv: fix the schema compatible string for the HiFive Unleashed board (2019-08-08 16:05:38 -0700)

----------------------------------------------------------------
RISC-V updates for v5.3-rc4

A few minor RISC-V updates for v5.3-rc4:

- Remove __udivdi3() from the 32-bit Linux port, converting the only
  upstream user to use do_div(), per Linux policy

- Convert the RISC-V standard clocksource away from per-cpu data structures,
  since only one is used by Linux, even on a multi-CPU system

- A set of DT binding updates that remove an obsolete text binding in
  favor of a YAML binding, fix a bogus compatible string in the schema
    (thus fixing a "make dtbs_check" warning), and clarifies the future
      values expected in one of the RISC-V CPU properties

----------------------------------------------------------------
Atish Patra (2):
      RISC-V: Remove per cpu clocksource
      dt-bindings: Update the riscv,isa string description

Palmer Dabbelt (1):
      RISC-V: Remove udivdi3

Paul Walmsley (3):
      riscv: delay: use do_div() instead of __udivdi3()
      dt-bindings: riscv: remove obsolete cpus.txt
      dt-bindings: riscv: fix the schema compatible string for the HiFive Unleashed board

 Documentation/devicetree/bindings/riscv/cpus.txt   | 162 ---------------------
 Documentation/devicetree/bindings/riscv/cpus.yaml  |  16 ++
 .../devicetree/bindings/riscv/sifive.yaml          |   2 +-
 arch/riscv/lib/Makefile                            |   2 -
 arch/riscv/lib/delay.c                             |   6 +-
 arch/riscv/lib/udivdi3.S                           |  32 ----
 drivers/clocksource/timer-riscv.c                  |   6 +-
 7 files changed, 24 insertions(+), 202 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/riscv/cpus.txt
 delete mode 100644 arch/riscv/lib/udivdi3.S