[2/3] x86: cpu: Add new Intel Atom CPU type
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Message ID 16de4480ae1216d5949d4d36787811dae35d2eff.1565856842.git.rahul.tanwar@linux.intel.com
State New
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Series
  • x86: cpu: Add new Airmont CPU model
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Commit Message

Tanwar, Rahul Aug. 15, 2019, 9:46 a.m. UTC
This patch adds a new variant of Intel Atom Airmont CPU model used in a
network processor SoC named Lightning Mountain.

Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
---
 arch/x86/include/asm/intel-family.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Borislav Petkov Aug. 15, 2019, 12:22 p.m. UTC | #1
On Thu, Aug 15, 2019 at 05:46:46PM +0800, Rahul Tanwar wrote:
> This patch adds a new variant of Intel Atom Airmont CPU model used in a
> network processor SoC named Lightning Mountain.
> 
> Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
> ---
>  arch/x86/include/asm/intel-family.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> index 0278aa66ef62..cbbb8250370f 100644
> --- a/arch/x86/include/asm/intel-family.h
> +++ b/arch/x86/include/asm/intel-family.h
> @@ -73,6 +73,7 @@
>  
>  #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* Cherry Trail, Braswell */
>  #define INTEL_FAM6_ATOM_AIRMONT_MID	0x5A /* Moorefield */
> +#define INTEL_FAM6_ATOM_AIRMONT_NP	0x75 /* Lightning Mountain */
>  
>  #define INTEL_FAM6_ATOM_GOLDMONT	0x5C /* Apollo Lake */
>  #define INTEL_FAM6_ATOM_GOLDMONT_X	0x5F /* Denverton */
> -- 

Also, in addition to what Thomas said, due to the fact that all the
different groups within Intel are sending patches with model names,
please synchronize that model naming and patch sending with Tony from
now on:

https://git.kernel.org/tip/5ed1c835ed8b522ce25071cc2d56a9a09bd5b59e

He'll document the naming scheme and pay attention to what goes where so
make sure you CC him, talk to him or have him in the loop, in general.

Thx.
Tanwar, Rahul Aug. 16, 2019, 3:22 a.m. UTC | #2
Hi Boris,

Well noted, will have Tony in loop from now on. Thanks.

Regards,

Rahul

On 15/8/2019 8:22 PM, Borislav Petkov wrote:
> On Thu, Aug 15, 2019 at 05:46:46PM +0800, Rahul Tanwar wrote:
>> This patch adds a new variant of Intel Atom Airmont CPU model used in a
>> network processor SoC named Lightning Mountain.
>>
>> Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
>> ---
>>   arch/x86/include/asm/intel-family.h | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
>> index 0278aa66ef62..cbbb8250370f 100644
>> --- a/arch/x86/include/asm/intel-family.h
>> +++ b/arch/x86/include/asm/intel-family.h
>> @@ -73,6 +73,7 @@
>>   
>>   #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* Cherry Trail, Braswell */
>>   #define INTEL_FAM6_ATOM_AIRMONT_MID	0x5A /* Moorefield */
>> +#define INTEL_FAM6_ATOM_AIRMONT_NP	0x75 /* Lightning Mountain */
>>   
>>   #define INTEL_FAM6_ATOM_GOLDMONT	0x5C /* Apollo Lake */
>>   #define INTEL_FAM6_ATOM_GOLDMONT_X	0x5F /* Denverton */
>> -- 
> Also, in addition to what Thomas said, due to the fact that all the
> different groups within Intel are sending patches with model names,
> please synchronize that model naming and patch sending with Tony from
> now on:
>
> https://git.kernel.org/tip/5ed1c835ed8b522ce25071cc2d56a9a09bd5b59e
>
> He'll document the naming scheme and pay attention to what goes where so
> make sure you CC him, talk to him or have him in the loop, in general.
>
> Thx.
>
Borislav Petkov Aug. 16, 2019, 6:43 a.m. UTC | #3
On Fri, Aug 16, 2019 at 11:22:16AM +0800, Tanwar, Rahul wrote:
> 
> Hi Boris,
> 
> Well noted, will have Tony in loop from now on. Thanks.

Ok.

Now to another question: you see how I put my reply to the previous mail
*below* the quoted text. Why is yours ontop? Why not put it after mine
since you're replying to it, like it is usually done on the mailing
lists and thus not confuse the reading order?

All I'm trying to say is, please do not top-post.

Thanks!
Tanwar, Rahul Aug. 16, 2019, 7:25 a.m. UTC | #4
On 16/8/2019 2:43 PM, Borislav Petkov wrote:
> Now to another question: you see how I put my reply to the previous mail
> *below* the quoted text. Why is yours ontop? Why not put it after mine
> since you're replying to it, like it is usually done on the mailing
> lists and thus not confuse the reading order?
>
> All I'm trying to say is, please do not top-post.

So sorry for missing out on this point. Will always keep in mind from 
now on.


Regards,

Rahul
Borislav Petkov Aug. 16, 2019, 7:38 a.m. UTC | #5
On Fri, Aug 16, 2019 at 03:25:51PM +0800, Tanwar, Rahul wrote:
> 
> On 16/8/2019 2:43 PM, Borislav Petkov wrote:
> > Now to another question: you see how I put my reply to the previous mail
> > *below* the quoted text. Why is yours ontop? Why not put it after mine
> > since you're replying to it, like it is usually done on the mailing
> > lists and thus not confuse the reading order?
> > 
> > All I'm trying to say is, please do not top-post.
> 
> So sorry for missing out on this point. Will always keep in mind from now
> on.

Thanks!

Patch
diff mbox series

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 0278aa66ef62..cbbb8250370f 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -73,6 +73,7 @@ 
 
 #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* Cherry Trail, Braswell */
 #define INTEL_FAM6_ATOM_AIRMONT_MID	0x5A /* Moorefield */
+#define INTEL_FAM6_ATOM_AIRMONT_NP	0x75 /* Lightning Mountain */
 
 #define INTEL_FAM6_ATOM_GOLDMONT	0x5C /* Apollo Lake */
 #define INTEL_FAM6_ATOM_GOLDMONT_X	0x5F /* Denverton */