[v2,2/3] x86/cpu: Add new Intel Atom CPU model name
diff mbox series

Message ID 83345984845d24b6ce97a32bef21cd0bbdffc86d.1565940653.git.rahul.tanwar@linux.intel.com
State New
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  • x86/cpu: Add new Airmont CPU model
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Commit Message

Rahul Tanwar Aug. 16, 2019, 8:18 a.m. UTC
Add a new variant of Intel Atom Airmont CPU model.

Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
---
 arch/x86/include/asm/intel-family.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Peter Zijlstra Aug. 20, 2019, 12:22 p.m. UTC | #1
On Fri, Aug 16, 2019 at 04:18:58PM +0800, Rahul Tanwar wrote:
> Add a new variant of Intel Atom Airmont CPU model.
> 
> Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
> ---
>  arch/x86/include/asm/intel-family.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> index 0278aa66ef62..cbbb8250370f 100644
> --- a/arch/x86/include/asm/intel-family.h
> +++ b/arch/x86/include/asm/intel-family.h
> @@ -73,6 +73,7 @@
>  
>  #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* Cherry Trail, Braswell */
>  #define INTEL_FAM6_ATOM_AIRMONT_MID	0x5A /* Moorefield */
> +#define INTEL_FAM6_ATOM_AIRMONT_NP	0x75 /* Lightning Mountain */

What's _NP ?
Luck, Tony Aug. 20, 2019, 12:48 p.m. UTC | #2
>> +#define INTEL_FAM6_ATOM_AIRMONT_NP    0x75 /* Lightning Mountain */
> 
> What's _NP ?

Network Processor. But that is too narrow a descriptor. This is going to be used in
other areas besides networking. 

I’m contemplating calling it AIRMONT2

-Tony
Thomas Gleixner Aug. 20, 2019, 1:04 p.m. UTC | #3
On Tue, 20 Aug 2019, Peter Zijlstra wrote:
> On Fri, Aug 16, 2019 at 04:18:58PM +0800, Rahul Tanwar wrote:
> > Add a new variant of Intel Atom Airmont CPU model.
> > 
> > Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
> > ---
> >  arch/x86/include/asm/intel-family.h | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> > index 0278aa66ef62..cbbb8250370f 100644
> > --- a/arch/x86/include/asm/intel-family.h
> > +++ b/arch/x86/include/asm/intel-family.h
> > @@ -73,6 +73,7 @@
> >  
> >  #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* Cherry Trail, Braswell */
> >  #define INTEL_FAM6_ATOM_AIRMONT_MID	0x5A /* Moorefield */
> > +#define INTEL_FAM6_ATOM_AIRMONT_NP	0x75 /* Lightning Mountain */
> 
> What's _NP ?

  Nuked Product
Andy Shevchenko Aug. 20, 2019, 1:22 p.m. UTC | #4
On Tue, Aug 20, 2019 at 03:48:05PM +0300, Luck, Tony wrote:
> 
> >> +#define INTEL_FAM6_ATOM_AIRMONT_NP    0x75 /* Lightning Mountain */
> > 
> > What's _NP ?
> 
> Network Processor. But that is too narrow a descriptor. This is going to be used in
> other areas besides networking. 
> 
> I’m contemplating calling it AIRMONT2

We used to have something like that for Silvermont. It was confusing.

commit f2c4db1bd80720cd8cb2a5aa220d9bc9f374f04e
Author: Peter Zijlstra <peterz@infradead.org>
Date:   Tue Aug 7 10:17:27 2018 -0700

    x86/cpu: Sanitize FAM6_ATOM naming


What 2 or 3 or other number means?
Luck, Tony Aug. 20, 2019, 2:20 p.m. UTC | #5
> Author: Peter Zijlstra <peterz@infradead.org>
> Date:   Tue Aug 7 10:17:27 2018 -0700
> 
>    x86/cpu: Sanitize FAM6_ATOM naming
> 
> 
> What 2 or 3 or other number means?

In this case I want it to mean “This is an Airmont derived core. Mostly like original Airmont, so you might see some places where we have the same model specific actions. But enough different that it has a new model ID so places where it is different can do something else”.

-Tony
Peter Zijlstra Aug. 20, 2019, 2:57 p.m. UTC | #6
On Tue, Aug 20, 2019 at 12:48:05PM +0000, Luck, Tony wrote:
> 
> >> +#define INTEL_FAM6_ATOM_AIRMONT_NP    0x75 /* Lightning Mountain */
> > 
> > What's _NP ?
> 
> Network Processor. But that is too narrow a descriptor. This is going to be used in
> other areas besides networking. 
> 
> I’m contemplating calling it AIRMONT2

What would describe the special sause that warranted a new SOC? If this
thing is marketed as 'Network Processor' then I suppose we can actually
use it, esp. if we're going to see this more, like the MID thing -- that
lived for a while over multiple uarchs.

Note that for the big cores we added the NNPI thing, which was for
Neural Network Processing something.
Rahul Tanwar Aug. 21, 2019, 3:21 a.m. UTC | #7
On 20/8/2019 10:57 PM, Peter Zijlstra wrote:
> On Tue, Aug 20, 2019 at 12:48:05PM +0000, Luck, Tony wrote:
>>>> +#define INTEL_FAM6_ATOM_AIRMONT_NP    0x75 /* Lightning Mountain */
>>> What's _NP ?
>> Network Processor. But that is too narrow a descriptor. This is going to be used in
>> other areas besides networking.
>>
>> I’m contemplating calling it AIRMONT2
> What would describe the special sause that warranted a new SOC? If this
> thing is marketed as 'Network Processor' then I suppose we can actually
> use it, esp. if we're going to see this more, like the MID thing -- that
> lived for a while over multiple uarchs.
>
> Note that for the big cores we added the NNPI thing, which was for
> Neural Network Processing something.


INTEL_FAM6_ATOM_AIRMONT_NP was used keeping in mind the recommended

symbol naming form i.e. INTEL_FAM6{OPTFAMILY}_{MICROARCH}{OPTDIFF}

where OPTDIFF is supposed to be the market segment.


This SoC uses AMT (Admantium/Airmont) configuration which is supposed to be

a higher configuration. Looking at other existing examples, it seems that

INTEL_FAM6_ATOM_AIRMONT_PLUS is most appropriate. Would you have any

concerns with _PLUS name ? Thanks.
Peter Zijlstra Aug. 21, 2019, 9:39 a.m. UTC | #8
On Wed, Aug 21, 2019 at 11:21:43AM +0800, Tanwar, Rahul wrote:
> On 20/8/2019 10:57 PM, Peter Zijlstra wrote:

> > What would describe the special sause that warranted a new SOC? If this
> > thing is marketed as 'Network Processor' then I suppose we can actually
> > use it, esp. if we're going to see this more, like the MID thing -- that
> > lived for a while over multiple uarchs.

> This SoC uses AMT (Admantium/Airmont) configuration which is supposed to be
> a higher configuration.

That's just words without meaning on this end. What's an Adamantium ?
Google doesn't seem to give any sort of clues..

And will we see more of these things, or is it a one off SOC?

> Looking at other existing examples, it seems that
> INTEL_FAM6_ATOM_AIRMONT_PLUS is most appropriate. Would you have any
> concerns with _PLUS name ? Thanks.

Yes, _PLUS is not an existing _OPTDIFF, the uarch is called "Goldmont
Plus", it is the 14nm refresh of the 14nm Goldmont, and predecessor of
Tremont.
Luck, Tony Aug. 21, 2019, 8:18 p.m. UTC | #9
On Tue, Aug 20, 2019 at 04:57:35PM +0200, Peter Zijlstra wrote:
> On Tue, Aug 20, 2019 at 12:48:05PM +0000, Luck, Tony wrote:
> > 
> > >> +#define INTEL_FAM6_ATOM_AIRMONT_NP    0x75 /* Lightning Mountain */
> > > 
> > > What's _NP ?
> > 
> > Network Processor. But that is too narrow a descriptor. This is going to be used in
> > other areas besides networking. 
> > 
> > I’m contemplating calling it AIRMONT2
> 
> What would describe the special sause that warranted a new SOC? If this
> thing is marketed as 'Network Processor' then I suppose we can actually
> use it, esp. if we're going to see this more, like the MID thing -- that
> lived for a while over multiple uarchs.

The reasons for allocating a new model number are a mystery.
I've seen cases where I thought we'd get a new numnber for sure,
but then just bumped the stepping. I've also seen us allocate a
new number when it didn't look needed (to me, from my OS perspective).

As I mentioned above, there are some folks internally that think
NP == Network Processor is too narrow a pigeonhole for this CPU.

But _NPAOS (Network Processor And Other Stuff) doesn't sound helpful.

> Note that for the big cores we added the NNPI thing, which was for
> Neural Network Processing something.

I'm sure that we will invent all sorts of strings for the "OPTDIFF"
part of the name (many of which will only be used once or twice).

Rationale for "AIRMONT2" is that this is derived from Airmont. So
you'd expect many model specific bits of code to do the same for
this as they did for plain AIRMONT. But in a few corner cases there
will be separate code.

Perhaps I need to update the rubric that I just added to the
head on intel-family.h to say that the MICROARCH element may
be followed by an optional number to differentiate SOCs that
use essentially the same core, but have different model numbers
because of SOC differences outside of the core.

-Tony
Thomas Gleixner Aug. 21, 2019, 9:27 p.m. UTC | #10
On Wed, 21 Aug 2019, Luck, Tony wrote:
> On Tue, Aug 20, 2019 at 04:57:35PM +0200, Peter Zijlstra wrote:
> > On Tue, Aug 20, 2019 at 12:48:05PM +0000, Luck, Tony wrote:
> > > 
> > > >> +#define INTEL_FAM6_ATOM_AIRMONT_NP    0x75 /* Lightning Mountain */
> > > > 
> > > > What's _NP ?
> > > 
> > > Network Processor. But that is too narrow a descriptor. This is going to be used in
> > > other areas besides networking. 
> > > 
> > > I’m contemplating calling it AIRMONT2
> > 
> > What would describe the special sause that warranted a new SOC? If this
> > thing is marketed as 'Network Processor' then I suppose we can actually
> > use it, esp. if we're going to see this more, like the MID thing -- that
> > lived for a while over multiple uarchs.
> 
> The reasons for allocating a new model number are a mystery.
> I've seen cases where I thought we'd get a new numnber for sure,
> but then just bumped the stepping. I've also seen us allocate a
> new number when it didn't look needed (to me, from my OS perspective).
> 
> As I mentioned above, there are some folks internally that think
> NP == Network Processor is too narrow a pigeonhole for this CPU.
> 
> But _NPAOS (Network Processor And Other Stuff) doesn't sound helpful.
> 
> > Note that for the big cores we added the NNPI thing, which was for
> > Neural Network Processing something.
> 
> I'm sure that we will invent all sorts of strings for the "OPTDIFF"
> part of the name (many of which will only be used once or twice).
> 
> Rationale for "AIRMONT2" is that this is derived from Airmont. So
> you'd expect many model specific bits of code to do the same for
> this as they did for plain AIRMONT. But in a few corner cases there
> will be separate code.
> 
> Perhaps I need to update the rubric that I just added to the
> head on intel-family.h to say that the MICROARCH element may
> be followed by an optional number to differentiate SOCs that
> use essentially the same core, but have different model numbers
> because of SOC differences outside of the core.

Well, that kinda defeats the idea that the MICROARCH element is about the
micro architecture. If the uarch is the same and it's just the SOC which is
different then it would be better to say AIRMONT_CLIENT_V2 or such

Thanks,

	tglx
Peter Zijlstra Aug. 22, 2019, 10:29 a.m. UTC | #11
On Wed, Aug 21, 2019 at 01:18:46PM -0700, Luck, Tony wrote:
> On Tue, Aug 20, 2019 at 04:57:35PM +0200, Peter Zijlstra wrote:

> As I mentioned above, there are some folks internally that think
> NP == Network Processor is too narrow a pigeonhole for this CPU.
> 
> But _NPAOS (Network Processor And Other Stuff) doesn't sound helpful.

So what is 'other stuff'; is there really no general term that describes
well what's been done to this SoC; or is it secret and we're in a catch
22 here?

> > Note that for the big cores we added the NNPI thing, which was for
> > Neural Network Processing something.
> 
> I'm sure that we will invent all sorts of strings for the "OPTDIFF"
> part of the name (many of which will only be used once or twice).

That's a bit sad; because as shown by the patches just send out; there
really isn't _that_ much variation right now.

Anyway, lets just give the thing a name; _NP whatever, and we can
rename it if needed.
Luck, Tony Aug. 22, 2019, 6:53 p.m. UTC | #12
On Thu, Aug 22, 2019 at 12:29:55PM +0200, Peter Zijlstra wrote:
> On Wed, Aug 21, 2019 at 01:18:46PM -0700, Luck, Tony wrote:
> > On Tue, Aug 20, 2019 at 04:57:35PM +0200, Peter Zijlstra wrote:
> 
> > As I mentioned above, there are some folks internally that think
> > NP == Network Processor is too narrow a pigeonhole for this CPU.
> > 
> > But _NPAOS (Network Processor And Other Stuff) doesn't sound helpful.
> 
> So what is 'other stuff'; is there really no general term that describes
> well what's been done to this SoC; or is it secret and we're in a catch
> 22 here?

Since CPU model number is one of the early bits of disclosure
in order to get support upstream in time for launch, safe to
assume that some products will not want to advertise everything
that far ahead.

> > > Note that for the big cores we added the NNPI thing, which was for
> > > Neural Network Processing something.
> > 
> > I'm sure that we will invent all sorts of strings for the "OPTDIFF"
> > part of the name (many of which will only be used once or twice).
> 
> That's a bit sad; because as shown by the patches just send out; there
> really isn't _that_ much variation right now.
> 
> Anyway, lets just give the thing a name; _NP whatever, and we can
> rename it if needed.

Your other patch series shows that you aren't afraid
of a little churn. So sure, we can go with _NP for now
and fix it up later.  It's not like some OEM is going
to make a CPU selection based on the #define name that
we gave it in Linux :-)

-Tony

Patch
diff mbox series

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 0278aa66ef62..cbbb8250370f 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -73,6 +73,7 @@ 
 
 #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* Cherry Trail, Braswell */
 #define INTEL_FAM6_ATOM_AIRMONT_MID	0x5A /* Moorefield */
+#define INTEL_FAM6_ATOM_AIRMONT_NP	0x75 /* Lightning Mountain */
 
 #define INTEL_FAM6_ATOM_GOLDMONT	0x5C /* Apollo Lake */
 #define INTEL_FAM6_ATOM_GOLDMONT_X	0x5F /* Denverton */