From: Rahul Tanwar <rahul.tanwar@linux.intel.com>
To: robh+dt@kernel.org, devicetree@vger.kernel.org,
gregkh@linuxfoundation.org, mark.rutland@arm.com,
linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, andriy.shevchenko@intel.com,
qi-ming.wu@intel.com, cheol.yong.kim@intel.com,
rahul.tanwar@intel.com,
Rahul Tanwar <rahul.tanwar@linux.intel.com>
Subject: [PATCH v3 2/2] dt-bindings: lantiq: Update for new SoC
Date: Wed, 21 Aug 2019 15:06:52 +0800 [thread overview]
Message-ID: <ffb6855d4c8d47412775b5fa4ce6ae4dd1161cb8.1566370151.git.rahul.tanwar@linux.intel.com> (raw)
In-Reply-To: <cover.1566370151.git.rahul.tanwar@linux.intel.com>
In-Reply-To: <cover.1566370151.git.rahul.tanwar@linux.intel.com>
Intel Lightning Mountain(LGM) reuses Lantiq ASC serial controller IP.
Update the dt bindings to support LGM as well.
Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
---
.../devicetree/bindings/serial/lantiq,asc.yaml | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/lantiq,asc.yaml b/Documentation/devicetree/bindings/serial/lantiq,asc.yaml
index 72ea2a3d75c9..14241ef37e8a 100644
--- a/Documentation/devicetree/bindings/serial/lantiq,asc.yaml
+++ b/Documentation/devicetree/bindings/serial/lantiq,asc.yaml
@@ -15,12 +15,14 @@ allOf:
properties:
compatible:
enum:
+ - intel,lgm-asc
- lantiq,asc
reg:
maxItems: 1
interrupts:
+ minItems: 1
maxItems: 3
clocks:
@@ -38,6 +40,29 @@ required:
- reg
- interrupts
+if:
+ properties:
+ compatible:
+ enum:
+ - intel,lgm-asc
+
+then:
+ properties:
+ interrupts:
+ minItems: 1
+ maxItems: 1
+ items:
+ - description: combined interrupt for tx, rx & err
+
+else:
+ properties:
+ interrupts:
+ minItems: 3
+ maxItems: 3
+ items:
+ - description: tx interrupt
+ - description: rx interrupt
+ - description: err interrupt
examples:
- |
@@ -52,4 +77,14 @@ examples:
clock-names = "freq", "asc";
};
+ - |
+ asc0: serial@e0a00000 {
+ compatible = "intel,lgm-asc";
+ reg = <0xe0a00000 0x1000>;
+ interrupt-parent = <&ioapic1>;
+ interrupts = <128 1>;
+ clocks = <&cgu0 LGM_CLK_NOC4>, <&cgu0 LGM_GCLK_ASC0>;
+ clock-names = "freq", "asc";
+ };
+
...
--
2.11.0
next prev parent reply other threads:[~2019-08-21 7:07 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-21 7:06 [PATCH v3 0/2] dt-bindings: serial: lantiq: Convert to YAML & add support for new SoC Rahul Tanwar
2019-08-21 7:06 ` [PATCH v3 1/2] dt-bindings: serial: lantiq: Convert to YAML schema Rahul Tanwar
2019-08-27 17:21 ` Rob Herring
2019-08-21 7:06 ` Rahul Tanwar [this message]
2019-08-27 17:22 ` [PATCH v3 2/2] dt-bindings: lantiq: Update for new SoC Rob Herring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ffb6855d4c8d47412775b5fa4ce6ae4dd1161cb8.1566370151.git.rahul.tanwar@linux.intel.com \
--to=rahul.tanwar@linux.intel.com \
--cc=andriy.shevchenko@intel.com \
--cc=cheol.yong.kim@intel.com \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=qi-ming.wu@intel.com \
--cc=rahul.tanwar@intel.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).