From: Xiaowei Bao <xiaowei.bao@nxp.com>
To: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com,
shawnguo@kernel.org, leoyang.li@nxp.com, kishon@ti.com,
lorenzo.pieralisi@arm.co, arnd@arndb.de,
gregkh@linuxfoundation.org, minghuan.Lian@nxp.com,
mingkai.hu@nxp.com, roy.zang@nxp.com, jingoohan1@gmail.com,
gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linuxppc-dev@lists.ozlabs.org, andrew.murray@arm.com
Cc: Xiaowei Bao <xiaowei.bao@nxp.com>
Subject: [PATCH v2 06/10] PCI: layerscape: Modify the way of getting capability with different PEX
Date: Thu, 22 Aug 2019 19:22:38 +0800 [thread overview]
Message-ID: <20190822112242.16309-6-xiaowei.bao@nxp.com> (raw)
In-Reply-To: <20190822112242.16309-1-xiaowei.bao@nxp.com>
The different PCIe controller in one board may be have different
capability of MSI or MSIX, so change the way of getting the MSI
capability, make it more flexible.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
---
v2:
- Remove the repeated assignment code.
drivers/pci/controller/dwc/pci-layerscape-ep.c | 26 +++++++++++++++++++-------
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c
index 4e92a95..8461f62 100644
--- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
+++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
@@ -22,6 +22,7 @@
struct ls_pcie_ep {
struct dw_pcie *pci;
+ struct pci_epc_features *ls_epc;
};
#define to_ls_pcie_ep(x) dev_get_drvdata((x)->dev)
@@ -40,25 +41,26 @@ static const struct of_device_id ls_pcie_ep_of_match[] = {
{ },
};
-static const struct pci_epc_features ls_pcie_epc_features = {
- .linkup_notifier = false,
- .msi_capable = true,
- .msix_capable = false,
-};
-
static const struct pci_epc_features*
ls_pcie_ep_get_features(struct dw_pcie_ep *ep)
{
- return &ls_pcie_epc_features;
+ struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+ struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci);
+
+ return pcie->ls_epc;
}
static void ls_pcie_ep_init(struct dw_pcie_ep *ep)
{
struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+ struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci);
enum pci_barno bar;
for (bar = BAR_0; bar <= BAR_5; bar++)
dw_pcie_ep_reset_bar(pci, bar);
+
+ pcie->ls_epc->msi_capable = ep->msi_cap ? true : false;
+ pcie->ls_epc->msix_capable = ep->msix_cap ? true : false;
}
static int ls_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
@@ -118,6 +120,7 @@ static int __init ls_pcie_ep_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct dw_pcie *pci;
struct ls_pcie_ep *pcie;
+ struct pci_epc_features *ls_epc;
struct resource *dbi_base;
int ret;
@@ -129,6 +132,10 @@ static int __init ls_pcie_ep_probe(struct platform_device *pdev)
if (!pci)
return -ENOMEM;
+ ls_epc = devm_kzalloc(dev, sizeof(*ls_epc), GFP_KERNEL);
+ if (!ls_epc)
+ return -ENOMEM;
+
dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);
if (IS_ERR(pci->dbi_base))
@@ -139,6 +146,11 @@ static int __init ls_pcie_ep_probe(struct platform_device *pdev)
pci->ops = &ls_pcie_ep_ops;
pcie->pci = pci;
+ ls_epc->linkup_notifier = false,
+ ls_epc->bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
+
+ pcie->ls_epc = ls_epc;
+
platform_set_drvdata(pdev, pcie);
ret = ls_add_pcie_ep(pcie, pdev);
--
2.9.5
next prev parent reply other threads:[~2019-08-22 11:33 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-22 11:22 [PATCH v2 01/10] PCI: designware-ep: Add multiple PFs support for DWC Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 02/10] PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode Xiaowei Bao
2019-08-23 13:35 ` Andrew Murray
2019-08-23 23:51 ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 03/10] PCI: designware-ep: Move the function of getting MSI capability forward Xiaowei Bao
2019-08-23 13:38 ` Andrew Murray
2019-08-24 0:20 ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 04/10] dt-bindings: pci: layerscape-pci: add compatible strings for ls1088a and ls2088a Xiaowei Bao
2019-08-27 22:26 ` Rob Herring
2019-08-29 9:19 ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 05/10] PCI: layerscape: Fix some format issue of the code Xiaowei Bao
2019-08-23 13:45 ` Andrew Murray
2019-08-24 0:00 ` Xiaowei Bao
2019-08-22 11:22 ` Xiaowei Bao [this message]
2019-08-22 11:43 ` [PATCH v2 06/10] PCI: layerscape: Modify the way of getting capability with different PEX Kishon Vijay Abraham I
2019-08-23 2:39 ` Xiaowei Bao
2019-08-23 3:39 ` Kishon Vijay Abraham I
2019-08-23 4:13 ` Xiaowei Bao
2019-09-02 13:36 ` Andrew Murray
2019-09-03 2:11 ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 07/10] PCI: layerscape: Modify the MSIX to the doorbell way Xiaowei Bao
2019-08-23 13:58 ` Andrew Murray
2019-08-24 0:08 ` Xiaowei Bao
2019-08-27 13:25 ` Andrew Murray
2019-08-28 2:49 ` Xiaowei Bao
2019-08-29 5:13 ` Kishon Vijay Abraham I
2019-11-05 12:37 ` Lorenzo Pieralisi
2019-11-06 9:33 ` Xiaowei Bao
2019-11-06 9:40 ` Gustavo Pimentel
2019-11-06 10:03 ` Xiaowei Bao
2019-11-06 13:39 ` Kishon Vijay Abraham I
2019-11-06 15:40 ` Gustavo Pimentel
2019-08-22 11:22 ` [PATCH v2 08/10] PCI: layerscape: Add EP mode support for ls1088a and ls2088a Xiaowei Bao
2019-08-23 14:27 ` Andrew Murray
2019-08-24 0:18 ` Xiaowei Bao
2019-08-24 6:45 ` christophe leroy
2019-08-25 3:07 ` Xiaowei Bao
2019-08-27 14:48 ` Andrew Murray
2019-08-28 3:25 ` Xiaowei Bao
2019-08-26 9:49 ` Xiaowei Bao
2019-08-27 13:34 ` Andrew Murray
2019-08-28 4:29 ` Xiaowei Bao
2019-08-28 9:01 ` Andrew Murray
2019-08-29 2:03 ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 09/10] arm64: dts: layerscape: Add PCIe EP node for ls1088a Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 10/10] misc: pci_endpoint_test: Add LS1088a in pci_device_id table Xiaowei Bao
2019-08-23 13:25 ` [PATCH v2 01/10] PCI: designware-ep: Add multiple PFs support for DWC Andrew Murray
2019-08-23 23:50 ` Xiaowei Bao
2019-08-27 13:10 ` Andrew Murray
2019-08-28 7:22 ` Xiaowei Bao
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