From: Chunfeng Yun <chunfeng.yun@mediatek.com>
To: Kishon Vijay Abraham I <kishon@ti.com>, Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock
Date: Fri, 23 Aug 2019 15:00:11 +0800 [thread overview]
Message-ID: <f6ee7d33103b43b2f1e1331c23c36057ef20b20d.1566542697.git.chunfeng.yun@mediatek.com> (raw)
In-Reply-To: <e99c0d7a55869a4425250c601b80a3331c9d0976.1566542696.git.chunfeng.yun@mediatek.com>
Usually the digital and anolog phys use the same reference clock,
but on some platforms, they are separated, so add another optional
clock to support it.
In order to keep the clock names consistent with PHY IP's, use
the da_ref for anolog phy and ref clock for digital phy.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
index dbc143ed5999..ed9a2641f204 100644
--- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
@@ -41,9 +41,12 @@ Optional properties (PHY_TYPE_USB2 port (child) node):
- clocks : a list of phandle + clock-specifier pairs, one for each
entry in clock-names
- clock-names : may contain
- "ref": 48M reference clock for HighSpeed anolog phy; and 26M
- reference clock for SuperSpeed anolog phy, sometimes is
+ "ref": 48M reference clock for HighSpeed (digital) phy; and 26M
+ reference clock for SuperSpeed (digital) phy, sometimes is
24M, 25M or 27M, depended on platform.
+ "da_ref": the reference clock of anolog phy, used if the clocks
+ of anolog and digital phys are separated, otherwise uses
+ "ref" clock only if need.
- mediatek,eye-src : u32, the value of slew rate calibrate
- mediatek,eye-vrt : u32, the selection of VRT reference voltage
--
2.23.0
next prev parent reply other threads:[~2019-08-23 7:00 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-23 7:00 [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
2019-08-23 7:00 ` [PATCH 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
2019-08-29 19:25 ` Rob Herring
2019-08-30 6:22 ` Chunfeng Yun
2019-08-23 7:00 ` [PATCH 03/11] dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
2019-08-29 20:03 ` Rob Herring
2019-08-23 7:00 ` Chunfeng Yun [this message]
2019-08-29 20:05 ` [PATCH 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock Rob Herring
2019-08-30 6:23 ` Chunfeng Yun
2019-08-23 7:00 ` [PATCH 05/11] dt-bindings: phy-mtk-tphy: add the properties about address mapping Chunfeng Yun
2019-08-29 20:16 ` Rob Herring
2019-08-23 7:00 ` [PATCH 06/11] phy: phy-mtk-tphy: add a property for disconnect threshold Chunfeng Yun
2019-08-23 7:00 ` [PATCH 07/11] phy: phy-mtk-tphy: add a property for internal resistance Chunfeng Yun
2019-08-23 7:00 ` [PATCH 08/11] phy: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
2019-08-23 7:00 ` [PATCH 09/11] phy: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
2019-08-23 7:00 ` [PATCH 10/11] phy: phy-mtk-tphy: add a new reference clock Chunfeng Yun
2019-08-23 7:00 ` [PATCH 11/11] arm64: dts: mt2712: use non-empty ranges for usb-phy Chunfeng Yun
2019-08-29 19:23 ` [PATCH 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Rob Herring
2019-08-30 6:03 ` Chunfeng Yun
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