From: <Tudor.Ambarus@microchip.com>
To: <marek.vasut@gmail.com>, <vigneshr@ti.com>,
<boris.brezillon@collabora.com>, <miquel.raynal@bootlin.com>,
<richard@nod.at>, <linux-mtd@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Cc: <Tudor.Ambarus@microchip.com>
Subject: [PATCH 4/5] mtd: spi-nor: Move clear_sr_bp() to 'struct spi_nor_flash_parameter'
Date: Fri, 23 Aug 2019 15:53:41 +0000 [thread overview]
Message-ID: <20190823155325.13459-5-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20190823155325.13459-1-tudor.ambarus@microchip.com>
From: Tudor Ambarus <tudor.ambarus@microchip.com>
All flash parameters and settings should reside inside
'struct spi_nor_flash_parameter'. Move clear_sr_bp() from
'struct spi_nor' to 'struct spi_nor_flash_parameter'.
Rename clear_sr_bp()/disable_block_protection() to better indicate
what the function does.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/spi-nor.c | 47 +++++++++++++++++++++++++++++++++----------
include/linux/mtd/spi-nor.h | 5 ++---
2 files changed, 38 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 6bd104c29cd9..15b0b1148bf3 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -4477,20 +4477,45 @@ static int spi_nor_quad_enable(struct spi_nor *nor)
return nor->params.quad_enable(nor);
}
+/**
+ * spi_nor_disable_block_protection() - Disable the write block protection
+ * during power-up.
+ * @nor: pointer to a 'struct spi_nor'
+ *
+ * Some spi-nor flashes are write protected by default after a power-on reset
+ * cycle, in order to avoid inadvertend writes during power-up. Backward
+ * compatibility imposes to disable the write block protection at power-up
+ * by default.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_disable_block_protection(struct spi_nor *nor)
+{
+ if (!nor->params.disable_block_protection)
+ return 0;
+
+ /*
+ * In case of the legacy quad enable requirements are set, if the
+ * configuration register Quad Enable bit is one, only the the
+ * Write Status (01h) command with two data bytes may be used to clear
+ * the block protection bits.
+ */
+ if (nor->params.quad_enable == spansion_quad_enable)
+ nor->params.disable_block_protection =
+ spi_nor_spansion_clear_sr_bp;
+
+ return nor->params.disable_block_protection(nor);
+}
+
static int spi_nor_init(struct spi_nor *nor)
{
int err;
- if (nor->clear_sr_bp) {
- if (nor->quad_enable == spansion_quad_enable)
- nor->clear_sr_bp = spi_nor_spansion_clear_sr_bp;
-
- err = nor->clear_sr_bp(nor);
- if (err) {
- dev_err(nor->dev,
- "fail to clear block protection bits\n");
- return err;
- }
+ err = spi_nor_disable_block_protection(nor);
+ if (err) {
+ dev_err(nor->dev,
+ "fail to unlock the flash at init (err = %d)\n", err);
+ return err;
}
err = spi_nor_quad_enable(nor);
@@ -4635,7 +4660,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
nor->info->flags & SPI_NOR_HAS_LOCK)
- nor->clear_sr_bp = spi_nor_clear_sr_bp;
+ nor->params.disable_block_protection = spi_nor_clear_sr_bp;
/* Parse the Serial Flash Discoverable Parameters table. */
ret = spi_nor_init_params(nor);
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 17787238f0e9..399ac34a529d 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -480,6 +480,7 @@ struct spi_nor;
* @page_programs: page program capabilities ordered by priority: the
* higher index in the array, the higher priority.
* @quad_enable: enables SPI NOR quad mode.
+ * @disable_block_protection: disables block protection during power-up.
*/
struct spi_nor_flash_parameter {
u64 size;
@@ -490,6 +491,7 @@ struct spi_nor_flash_parameter {
struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
int (*quad_enable)(struct spi_nor *nor);
+ int (*disable_block_protection)(struct spi_nor *nor);
};
/**
@@ -535,8 +537,6 @@ struct flash_info;
* @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR
* @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
* completely locked
- * @clear_sr_bp: [FLASH-SPECIFIC] clears the Block Protection Bits from
- * the SPI NOR Status Register.
* @params: [FLASH-SPECIFIC] SPI-NOR flash parameters and settings.
* The structure includes legacy flash parameters and
* settings that can be overwritten by the spi_nor_fixups
@@ -578,7 +578,6 @@ struct spi_nor {
int (*flash_lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
- int (*clear_sr_bp)(struct spi_nor *nor);
struct spi_nor_flash_parameter params;
void *priv;
--
2.9.5
next prev parent reply other threads:[~2019-08-23 15:54 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-23 15:53 [PATCH 0/5] mtd: spi-nor: move manuf out of the core - batch 0 Tudor.Ambarus
2019-08-23 15:53 ` [PATCH 1/5] mtd: spi-nor: Regroup flash parameter and settings Tudor.Ambarus
2019-08-25 11:32 ` Boris Brezillon
2019-08-23 15:53 ` [PATCH 2/5] mtd: spi-nor: Use nor->params Tudor.Ambarus
2019-08-25 11:31 ` Boris Brezillon
2019-08-23 15:53 ` [PATCH 3/5] mtd: spi-nor: Drop quad_enable() from 'struct spi-nor' Tudor.Ambarus
2019-08-25 11:32 ` Boris Brezillon
2019-08-23 15:53 ` Tudor.Ambarus [this message]
2019-08-24 3:53 ` [PATCH 4/5] mtd: spi-nor: Move clear_sr_bp() to 'struct spi_nor_flash_parameter' Tudor.Ambarus
2019-08-25 11:33 ` Boris Brezillon
2019-08-25 13:09 ` Boris Brezillon
2019-08-25 13:19 ` Tudor.Ambarus
2019-08-25 13:28 ` Boris Brezillon
2019-08-23 15:53 ` [PATCH 5/5] mtd: spi-nor: Move erase_map " Tudor.Ambarus
2019-08-25 11:34 ` Boris Brezillon
2019-08-25 11:38 ` [PATCH 0/5] mtd: spi-nor: move manuf out of the core - batch 0 Boris Brezillon
2019-08-25 13:02 ` Tudor.Ambarus
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190823155325.13459-5-tudor.ambarus@microchip.com \
--to=tudor.ambarus@microchip.com \
--cc=boris.brezillon@collabora.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=marek.vasut@gmail.com \
--cc=miquel.raynal@bootlin.com \
--cc=richard@nod.at \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).