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From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>, <yong.wu@mediatek.com>,
	<youlin.pei@mediatek.com>,
	Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
	Matthias Kaehlcke <mka@chromium.org>, <cui.zhang@mediatek.com>,
	<chao.hao@mediatek.com>, <ming-fan.chen@mediatek.com>
Subject: [PATCH v11 14/23] iommu/mediatek: Move reset_axi into plat_data
Date: Sat, 24 Aug 2019 11:01:59 +0800	[thread overview]
Message-ID: <1566615728-26388-15-git-send-email-yong.wu@mediatek.com> (raw)
In-Reply-To: <1566615728-26388-1-git-send-email-yong.wu@mediatek.com>

In mt8173 and mt8183, 0x48 is REG_MMU_STANDARD_AXI_MODE while it is
REG_MMU_CTRL in the other SoCs, and the bits meaning is completely
different with the REG_MMU_STANDARD_AXI_MODE.

This patch moves this property to plat_data, it's also a preparing
patch for mt8183.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
---
 drivers/iommu/mtk_iommu.c | 4 ++--
 drivers/iommu/mtk_iommu.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 947a8c6b8..b43f36a 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -577,8 +577,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
 	}
 	writel_relaxed(0, data->base + REG_MMU_DCM_DIS);
 
-	/* It's MISC control register whose default value is ok except mt8173.*/
-	if (data->plat_data->m4u_plat == M4U_MT8173)
+	if (data->plat_data->reset_axi)
 		writel_relaxed(0, data->base + REG_MMU_STANDARD_AXI_MODE);
 
 	if (devm_request_irq(data->dev, data->irq, mtk_iommu_isr, 0,
@@ -774,6 +773,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
 	.m4u_plat     = M4U_MT8173,
 	.has_4gb_mode = true,
 	.has_bclk     = true,
+	.reset_axi    = true,
 	.larbid_remap = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index d1a1d88..8d3b525 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -38,7 +38,7 @@ struct mtk_iommu_plat_data {
 
 	/* HW will use the EMI clock if there isn't the "bclk". */
 	bool                has_bclk;
-
+	bool                reset_axi;
 	unsigned char       larbid_remap[MTK_LARB_NR_MAX];
 };
 
-- 
1.9.1


  parent reply	other threads:[~2019-08-24  3:05 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-24  3:01 [PATCH v11 00/23] MT8183 IOMMU SUPPORT Yong Wu
2019-08-24  3:01 ` [PATCH v11 01/23] dt-bindings: mediatek: Add binding for mt8183 IOMMU and SMI Yong Wu
2019-08-24  3:01 ` [PATCH v11 02/23] iommu/mediatek: Use a struct as the platform data Yong Wu
2019-08-24  3:01 ` [PATCH v11 03/23] memory: mtk-smi: Use a general config_port interface Yong Wu
2019-08-24  3:01 ` [PATCH v11 04/23] memory: mtk-smi: Use a struct for the platform data for smi-common Yong Wu
2019-08-24  3:01 ` [PATCH v11 05/23] iommu/mediatek: Fix iova_to_phys PA start for 4GB mode Yong Wu
2019-08-24  3:01 ` [PATCH v11 06/23] iommu/io-pgtable-arm-v7s: Add paddr_to_iopte and iopte_to_paddr helpers Yong Wu
2019-08-24  3:01 ` [PATCH v11 07/23] iommu/io-pgtable-arm-v7s: Use ias/oas to check the valid iova/pa Yong Wu
2019-08-24  3:01 ` [PATCH v11 08/23] iommu/io-pgtable-arm-v7s: Rename the quirk from MTK_4GB to MTK_EXT Yong Wu
2019-08-24  3:01 ` [PATCH v11 09/23] iommu/io-pgtable-arm-v7s: Extend to support PA[33:32] for MediaTek Yong Wu
2019-08-24  3:01 ` [PATCH v11 10/23] iommu/mediatek: Adjust the PA for the 4GB Mode Yong Wu
2019-08-24  3:01 ` [PATCH v11 11/23] iommu/mediatek: Add bclk can be supported optionally Yong Wu
2019-08-24  3:01 ` [PATCH v11 12/23] iommu/mediatek: Add larb-id remapped support Yong Wu
2019-08-24  3:01 ` [PATCH v11 13/23] iommu/mediatek: Refine protect memory definition Yong Wu
2019-08-24  3:01 ` Yong Wu [this message]
2019-08-24  3:02 ` [PATCH v11 15/23] iommu/mediatek: Move vld_pa_rng into plat_data Yong Wu
2019-08-24  3:02 ` [PATCH v11 16/23] memory: mtk-smi: Add gals support Yong Wu
2019-08-24  3:02 ` [PATCH v11 17/23] iommu/mediatek: Add mt8183 IOMMU support Yong Wu
2019-08-24  3:02 ` [PATCH v11 18/23] iommu/mediatek: Add mmu1 support Yong Wu
2019-08-24  3:02 ` [PATCH v11 19/23] memory: mtk-smi: Invoke pm runtime_callback to enable clocks Yong Wu
2019-08-24  3:02 ` [PATCH v11 20/23] memory: mtk-smi: Add bus_sel for mt8183 Yong Wu
2019-08-24  3:02 ` [PATCH v11 21/23] iommu/mediatek: Fix VLD_PA_RNG register backup when suspend Yong Wu
2019-08-24  3:02 ` [PATCH v11 22/23] memory: mtk-smi: Get rid of need_larbid Yong Wu
2019-08-24  3:02 ` [PATCH v11 23/23] iommu/mediatek: Clean up struct mtk_smi_iommu Yong Wu
2019-08-24 11:57 ` [PATCH v11 00/23] MT8183 IOMMU SUPPORT Will Deacon
2019-08-30 14:21 ` Joerg Roedel

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