From: Stephen Boyd <sboyd@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH 11/12] clk: gate: Add support for specifying parents via DT/pointers
Date: Fri, 30 Aug 2019 08:09:22 -0700 [thread overview]
Message-ID: <20190830150923.259497-12-sboyd@kernel.org> (raw)
In-Reply-To: <20190830150923.259497-1-sboyd@kernel.org>
After commit fc0c209c147f ("clk: Allow parents to be specified without
string names") we can use DT or direct clk_hw pointers to specify
parents. Create a generic function that shouldn't be used very often to
encode the multitude of ways of registering a gate clk with different
parent information. Then add a bunch of wrapper macros that only pass
down what needs to be passed down to the generic function to support
this with less arguments.
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
I'm debating having the multiplexer function take a DT index, clk_hw
pointer, fw_name and name as different parameters. Then we can just
always use the parent_data approach and cover all bases.
drivers/clk/clk-gate.c | 35 ++++++++++-----------
include/linux/clk-provider.h | 59 ++++++++++++++++++++++++++++++++++--
2 files changed, 74 insertions(+), 20 deletions(-)
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 1b99fc962745..4296bb012abf 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -123,26 +123,18 @@ const struct clk_ops clk_gate_ops = {
};
EXPORT_SYMBOL_GPL(clk_gate_ops);
-/**
- * clk_hw_register_gate - register a gate clock with the clock framework
- * @dev: device that is registering this clock
- * @name: name of this clock
- * @parent_name: name of this clock's parent
- * @flags: framework-specific flags for this clock
- * @reg: register address to control gating of this clock
- * @bit_idx: which bit in the register controls gating of this clock
- * @clk_gate_flags: gate-specific flags for this clock
- * @lock: shared register lock for this clock
- */
-struct clk_hw *clk_hw_register_gate(struct device *dev, const char *name,
- const char *parent_name, unsigned long flags,
+struct clk_hw *__clk_hw_register_gate(struct device *dev,
+ struct device_node *np, const char *name,
+ const char *parent_name, const struct clk_hw *parent_hw,
+ const struct clk_parent_data *parent_data,
+ unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock)
{
struct clk_gate *gate;
struct clk_hw *hw;
struct clk_init_data init;
- int ret;
+ int ret = -EINVAL;
if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
if (bit_idx > 15) {
@@ -160,7 +152,12 @@ struct clk_hw *clk_hw_register_gate(struct device *dev, const char *name,
init.ops = &clk_gate_ops;
init.flags = flags;
init.parent_names = parent_name ? &parent_name : NULL;
- init.num_parents = parent_name ? 1 : 0;
+ init.parent_hws = parent_hw ? &parent_hw : NULL;
+ init.parent_data = parent_data;
+ if (parent_name || parent_hw || parent_data)
+ init.num_parents = 1;
+ else
+ init.num_parents = 0;
/* struct clk_gate assignments */
gate->reg = reg;
@@ -170,15 +167,19 @@ struct clk_hw *clk_hw_register_gate(struct device *dev, const char *name,
gate->hw.init = &init;
hw = &gate->hw;
- ret = clk_hw_register(dev, hw);
+ if (dev || !np)
+ ret = clk_hw_register(dev, hw);
+ else if (np)
+ ret = of_clk_hw_register(np, hw);
if (ret) {
kfree(gate);
hw = ERR_PTR(ret);
}
return hw;
+
}
-EXPORT_SYMBOL_GPL(clk_hw_register_gate);
+EXPORT_SYMBOL_GPL(__clk_hw_register_gate);
struct clk *clk_register_gate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 47dd0efce416..04576a7a0f37 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -475,14 +475,67 @@ struct clk_gate {
#define CLK_GATE_BIG_ENDIAN BIT(2)
extern const struct clk_ops clk_gate_ops;
-struct clk *clk_register_gate(struct device *dev, const char *name,
- const char *parent_name, unsigned long flags,
+struct clk_hw *__clk_hw_register_gate(struct device *dev,
+ struct device_node *np, const char *name,
+ const char *parent_name, const struct clk_hw *parent_hw,
+ const struct clk_parent_data *parent_data,
+ unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock);
-struct clk_hw *clk_hw_register_gate(struct device *dev, const char *name,
+struct clk *clk_register_gate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock);
+/**
+ * clk_hw_register_gate - register a gate clock with the clock framework
+ * @dev: device that is registering this clock
+ * @name: name of this clock
+ * @parent_name: name of this clock's parent
+ * @flags: framework-specific flags for this clock
+ * @reg: register address to control gating of this clock
+ * @bit_idx: which bit in the register controls gating of this clock
+ * @clk_gate_flags: gate-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+#define clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx, \
+ clk_gate_flags, lock) \
+ __clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
+ NULL, (flags), (reg), (bit_idx), \
+ (clk_gate_flags), (lock))
+/**
+ * clk_hw_register_gate_parent_hw - register a gate clock with the clock
+ * framework
+ * @dev: device that is registering this clock
+ * @name: name of this clock
+ * @parent_hw: pointer to parent clk
+ * @flags: framework-specific flags for this clock
+ * @reg: register address to control gating of this clock
+ * @bit_idx: which bit in the register controls gating of this clock
+ * @clk_gate_flags: gate-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+#define clk_hw_register_gate_parent_hw(dev, name, parent_name, flags, reg, \
+ bit_idx, clk_gate_flags, lock) \
+ __clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
+ NULL, (flags), (reg), (bit_idx), \
+ (clk_gate_flags), (lock))
+/**
+ * clk_hw_register_gate_parent_data - register a gate clock with the clock
+ * framework
+ * @dev: device that is registering this clock
+ * @name: name of this clock
+ * @parent_data: parent clk data
+ * @flags: framework-specific flags for this clock
+ * @reg: register address to control gating of this clock
+ * @bit_idx: which bit in the register controls gating of this clock
+ * @clk_gate_flags: gate-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+#define clk_hw_register_gate_parent_data(dev, name, parent_name, flags, reg, \
+ bit_idx, clk_gate_flags, lock) \
+ __clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
+ NULL, (flags), (reg), (bit_idx), \
+ (clk_gate_flags), (lock))
void clk_unregister_gate(struct clk *clk);
void clk_hw_unregister_gate(struct clk_hw *hw);
int clk_gate_is_enabled(struct clk_hw *hw);
--
Sent by a computer through tubes
next prev parent reply other threads:[~2019-08-30 15:09 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-30 15:09 [PATCH 00/12] Convert some basic type clks to new parent way Stephen Boyd
2019-08-30 15:09 ` [PATCH 01/12] clk: gpio: Use DT way of specifying parents Stephen Boyd
2020-01-07 6:43 ` Stephen Boyd
2019-08-30 15:09 ` [PATCH 02/12] clk: fixed-rate: Convert to clk_hw based APIs Stephen Boyd
2020-01-07 6:43 ` Stephen Boyd
2019-08-30 15:09 ` [PATCH 03/12] clk: fixed-rate: Remove clk_register_fixed_rate_with_accuracy() Stephen Boyd
2020-01-07 6:43 ` Stephen Boyd
2019-08-30 15:09 ` [PATCH 04/12] clk: fixed-rate: Move to_clk_fixed_rate() to C file Stephen Boyd
2020-01-07 6:44 ` Stephen Boyd
2019-08-30 15:09 ` [PATCH 05/12] clk: fixed-rate: Document accuracy member Stephen Boyd
2020-01-07 6:44 ` Stephen Boyd
2019-08-30 15:09 ` [PATCH 06/12] clk: fixed-rate: Add support for specifying parents via DT/pointers Stephen Boyd
2020-01-07 6:57 ` Stephen Boyd
2019-08-30 15:09 ` [PATCH 07/12] clk: fixed-rate: Add clk flags for parent accuracy Stephen Boyd
2020-01-07 6:57 ` Stephen Boyd
2019-08-30 15:09 ` [PATCH 08/12] clk: fixed-rate: Document that accuracy isn't a rate Stephen Boyd
2020-01-07 6:57 ` Stephen Boyd
2019-08-30 15:09 ` [PATCH 09/12] clk: asm9260: Use parent accuracy in fixed rate clk Stephen Boyd
2020-01-07 6:57 ` Stephen Boyd
2019-08-30 15:09 ` [PATCH 10/12] clk: mux: Add support for specifying parents via DT/pointers Stephen Boyd
2020-01-07 6:57 ` Stephen Boyd
2019-08-30 15:09 ` Stephen Boyd [this message]
2020-01-07 6:58 ` [PATCH 11/12] clk: gate: " Stephen Boyd
2019-08-30 15:09 ` [PATCH 12/12] clk: divider: " Stephen Boyd
2020-01-07 6:58 ` Stephen Boyd
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