From: Lukasz Luba <l.luba@partner.samsung.com>
To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: b.zolnierkie@samsung.com, krzk@kernel.org, kgene@kernel.org,
mark.rutland@arm.com, cw00.choi@samsung.com,
kyungmin.park@samsung.com, m.szyprowski@samsung.com,
s.nawrocki@samsung.com, myungjoo.ham@samsung.com,
robh+dt@kernel.org, willy.mh.wolff.ml@gmail.com,
Lukasz Luba <l.luba@partner.samsung.com>
Subject: [PATCH 2/3] ARM: dts: exynos: map 0x10000 SFR instead of 0x100 in DMC Exynos5422
Date: Wed, 25 Sep 2019 18:18:12 +0200 [thread overview]
Message-ID: <20190925161813.21117-3-l.luba@partner.samsung.com> (raw)
In-Reply-To: <20190925161813.21117-1-l.luba@partner.samsung.com>
There is a need to access registers at address offset near 0x10000.
These registers are private DMC performance counters, which might be used
as interrupt trigger when overflow. Potential usage is to skip polling
in devfreq framework and switch to interrupt managed bandwidth control.
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
arch/arm/boot/dts/exynos5420.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 72738e620d11..b695f07f7eed 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -239,7 +239,7 @@
dmc: memory-controller@10c20000 {
compatible = "samsung,exynos5422-dmc";
- reg = <0x10c20000 0x100>, <0x10c30000 0x100>;
+ reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
interrupt-parent = <&combiner>;
interrupts = <16 0>;
clocks = <&clock CLK_FOUT_SPLL>,
--
2.17.1
next prev parent reply other threads:[~2019-09-25 16:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20190925161841eucas1p12b3b798020b3493e9a4804d98b422f17@eucas1p1.samsung.com>
2019-09-25 16:18 ` [PATCH 0/3] Exynos5 DMC interrupt mode Lukasz Luba
[not found] ` <CGME20190925161842eucas1p271a9cf4f62b3d7af02c0a5d0d1eb9c4f@eucas1p2.samsung.com>
2019-09-25 16:18 ` [PATCH 1/3] ARM: dts: exynos: Add interrupt to DMC controller in Exynos5422 Lukasz Luba
2019-09-27 8:53 ` Krzysztof Kozlowski
2019-10-01 12:38 ` Lukasz Luba
[not found] ` <CGME20190925161843eucas1p1abaa1aaa20fcf5c55c9e52bb6a491317@eucas1p1.samsung.com>
2019-09-25 16:18 ` Lukasz Luba [this message]
[not found] ` <CGME20190925161844eucas1p2dc69a451c2d86fd7f4be2b33940f8d62@eucas1p2.samsung.com>
2019-09-25 16:18 ` [PATCH 3/3] memory: samsung: exynos5422-dmc: Add support for interrupt from performance counters Lukasz Luba
2019-09-27 9:19 ` Krzysztof Kozlowski
2019-10-01 10:11 ` Lukasz Luba
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