From: Atish Patra <atish.patra@wdc.com>
To: linux-kernel@vger.kernel.org
Cc: Atish Patra <atish.patra@wdc.com>,
Alan Kao <alankao@andestech.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Allison Randal <allison@lohutok.net>,
Anup Patel <anup@brainfault.org>, Gary Guo <gary@garyguo.net>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-riscv@lists.infradead.org,
Mike Rapoport <rppt@linux.ibm.com>,
Palmer Dabbelt <palmer@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI.
Date: Thu, 26 Sep 2019 17:09:13 -0700 [thread overview]
Message-ID: <20190927000915.31781-2-atish.patra@wdc.com> (raw)
In-Reply-To: <20190927000915.31781-1-atish.patra@wdc.com>
As per the new SBI specification, current SBI implementation version
is defined as 0.1 and will be removed/replaced in future. Each of the
function call in 0.1 is defined as a separate extension which makes
easier to replace them one at a time.
Rename existing implementation to reflect that. This patch is just
a preparatory patch for SBI v0.2 and doesn't introduce any functional
changes.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/include/asm/sbi.h | 43 +++++++++++++++++++-----------------
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 21134b3ef404..2147f384fad0 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -8,17 +8,17 @@
#include <linux/types.h>
-#define SBI_SET_TIMER 0
-#define SBI_CONSOLE_PUTCHAR 1
-#define SBI_CONSOLE_GETCHAR 2
-#define SBI_CLEAR_IPI 3
-#define SBI_SEND_IPI 4
-#define SBI_REMOTE_FENCE_I 5
-#define SBI_REMOTE_SFENCE_VMA 6
-#define SBI_REMOTE_SFENCE_VMA_ASID 7
-#define SBI_SHUTDOWN 8
+#define SBI_EXT_0_1_SET_TIMER 0x0
+#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1
+#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2
+#define SBI_EXT_0_1_CLEAR_IPI 0x3
+#define SBI_EXT_0_1_SEND_IPI 0x4
+#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7
+#define SBI_EXT_0_1_SHUTDOWN 0x8
-#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
+#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
@@ -42,48 +42,50 @@
static inline void sbi_console_putchar(int ch)
{
- SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
+ SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch);
}
static inline int sbi_console_getchar(void)
{
- return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
+ return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR);
}
static inline void sbi_set_timer(uint64_t stime_value)
{
#if __riscv_xlen == 32
- SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
+ SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value,
+ stime_value >> 32);
#else
- SBI_CALL_1(SBI_SET_TIMER, stime_value);
+ SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value);
#endif
}
static inline void sbi_shutdown(void)
{
- SBI_CALL_0(SBI_SHUTDOWN);
+ SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN);
}
static inline void sbi_clear_ipi(void)
{
- SBI_CALL_0(SBI_CLEAR_IPI);
+ SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI);
}
static inline void sbi_send_ipi(const unsigned long *hart_mask)
{
- SBI_CALL_1(SBI_SEND_IPI, hart_mask);
+ SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask);
}
static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
{
- SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
+ SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask);
}
static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
unsigned long start,
unsigned long size)
{
- SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size);
+ SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask,
+ start, size);
}
static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
@@ -91,7 +93,8 @@ static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
unsigned long size,
unsigned long asid)
{
- SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
+ SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask,
+ start, size, asid);
}
#endif
--
2.21.0
next prev parent reply other threads:[~2019-09-27 0:09 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-27 0:09 [PATCH v2 0/3] Add support for SBI v0.2 Atish Patra
2019-09-27 0:09 ` Atish Patra [this message]
2019-09-27 5:47 ` [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI Anup Patel
2019-09-27 22:19 ` Christoph Hellwig
2019-09-27 0:09 ` [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2 Atish Patra
2019-09-27 5:47 ` Anup Patel
2019-10-03 5:18 ` Anup Patel
2019-09-27 0:09 ` [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi Atish Patra
2019-09-27 5:48 ` Anup Patel
2019-09-27 22:21 ` Christoph Hellwig
2019-10-03 5:30 ` Anup Patel
2019-10-08 15:39 ` Christoph Hellwig
2019-09-27 22:19 ` [PATCH v2 0/3] Add support for SBI v0.2 Christoph Hellwig
2019-09-27 22:57 ` Atish Patra
2019-10-01 4:58 ` Alan Kao
2019-10-01 7:31 ` Atish Patra
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