From: Lukasz Luba <l.luba@partner.samsung.com>
To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: b.zolnierkie@samsung.com, krzk@kernel.org, kgene@kernel.org,
mark.rutland@arm.com, cw00.choi@samsung.com,
kyungmin.park@samsung.com, m.szyprowski@samsung.com,
s.nawrocki@samsung.com, myungjoo.ham@samsung.com,
robh+dt@kernel.org, willy.mh.wolff.ml@gmail.com,
Lukasz Luba <l.luba@partner.samsung.com>
Subject: [PATCH v3 1/4] dt-bindings: memory-controllers: Add Exynos5422 DMC interrupts description
Date: Wed, 2 Oct 2019 08:04:52 +0200 [thread overview]
Message-ID: <20191002060455.3834-2-l.luba@partner.samsung.com> (raw)
In-Reply-To: <20191002060455.3834-1-l.luba@partner.samsung.com>
Add description for optional interrupt lines. It provides a new operation
mode, which uses internal performance counters interrupt when overflow.
This is more reliable than using default polling mode implemented in
devfreq.
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
.../bindings/memory-controllers/exynos5422-dmc.txt | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
index 02aeb3b5a820..e2434cac4858 100644
--- a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
@@ -31,6 +31,14 @@ Required properties for DMC device for Exynos5422:
The register offsets are in the driver code and specyfic for this SoC
type.
+Optional properties for DMC device for Exynos5422:
+- interrupt-parent : The parent interrupt controller.
+- interrupts : Contains the IRQ line numbers for the DMC internal performance
+ event counters in DREX0 and DREX1 channels. Align with specification of the
+ interrupt line(s) in the interrupt-parent controller.
+- interrupt-names : IRQ names "drex_0" and "drex_1", the order should be the
+ same as in the 'interrupts' list above.
+
Example:
ppmu_dmc0_0: ppmu@10d00000 {
@@ -70,4 +78,7 @@ Example:
device-handle = <&samsung_K3QF2F20DB>;
vdd-supply = <&buck1_reg>;
samsung,syscon-clk = <&clock>;
+ interrupt-parent = <&combiner>;
+ interrupts = <16 0>, <16 1>;
+ interrupt-names = "drex_0", "drex_1";
};
--
2.17.1
next prev parent reply other threads:[~2019-10-02 6:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20191002060503eucas1p25fb14ebbf05a5599f8faeacbd3a15887@eucas1p2.samsung.com>
2019-10-02 6:04 ` [PATCH v3 0/4] Exynos5 DMC interrupt mode Lukasz Luba
[not found] ` <CGME20191002060504eucas1p2f023677bb85a7f6a1efebf891e8d81df@eucas1p2.samsung.com>
2019-10-02 6:04 ` Lukasz Luba [this message]
2019-10-02 17:23 ` [PATCH v3 1/4] dt-bindings: memory-controllers: Add Exynos5422 DMC interrupts description Krzysztof Kozlowski
[not found] ` <CGME20191002060505eucas1p2efd80ccde8c728973df8d932580cd58b@eucas1p2.samsung.com>
2019-10-02 6:04 ` [PATCH v3 2/4] ARM: dts: exynos: Add interrupt to DMC controller in Exynos5422 Lukasz Luba
2019-10-02 17:24 ` Krzysztof Kozlowski
[not found] ` <CGME20191002060506eucas1p28c9670128f5adfb628d7e84ce55c6e60@eucas1p2.samsung.com>
2019-10-02 6:04 ` [PATCH v3 3/4] ARM: dts: exynos: map 0x10000 SFR instead of 0x100 in DMC Exynos5422 Lukasz Luba
2019-10-02 17:29 ` Krzysztof Kozlowski
[not found] ` <CGME20191002060507eucas1p169394dec59f010e112eb38d83e3fb8ba@eucas1p1.samsung.com>
2019-10-02 6:04 ` [PATCH v3 4/4] memory: samsung: exynos5422-dmc: Add support for interrupt from performance counters Lukasz Luba
2019-10-02 17:38 ` Krzysztof Kozlowski
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