[GIT,PULL] RISC-V updates for v5.4-rc2
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  • [GIT,PULL] RISC-V updates for v5.4-rc2
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Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.4-rc2

Message

Paul Walmsley Oct. 4, 2019, 5:36 p.m. UTC
Linus,

The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c:

  Linux 5.4-rc1 (2019-09-30 10:35:40 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.4-rc2

for you to fetch changes up to 922b0375fc93fb1a20c5617e37c389c26bbccb70:

  riscv: Fix memblock reservation for device tree blob (2019-10-01 13:22:39 -0700)

----------------------------------------------------------------
RISC-V updates for v5.4-rc2

Two RISC-V fixes for v5.4-rc2:

- Ensure that exclusive-load reservations are terminated after system
  call or exception handling.  This primarily affects QEMU, which does
    not expire load reservations.

- Fix an issue primarily affecting RV32 platforms that can cause the
  DT header to be corrupted, causing boot failures.

----------------------------------------------------------------
Albert Ou (1):
      riscv: Fix memblock reservation for device tree blob

Palmer Dabbelt (1):
      RISC-V: Clear load reservations while restoring hart contexts

 arch/riscv/include/asm/asm.h |  1 +
 arch/riscv/kernel/entry.S    | 21 ++++++++++++++++++++-
 arch/riscv/mm/init.c         | 12 +++++++++++-
 3 files changed, 32 insertions(+), 2 deletions(-)

Comments

Linus Torvalds Oct. 4, 2019, 8:26 p.m. UTC | #1
On Fri, Oct 4, 2019 at 10:36 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
> - Ensure that exclusive-load reservations are terminated after system
>   call or exception handling.  This primarily affects QEMU, which does
>     not expire load reservations.

Grr. Can somebody talk sense to the RISC-V architects?

Copying the PowerPC model was broken. PowerPC has now become the
absolute worst architecture out there wrt just about any memory
ordering issues, and the exclusive reservation is just another example
of that.

ARMv8 and even alpha got this right, and clear the reservation on
return from traps/exceptions.

Why did RISC-V copy the power model? (Yeah, I realize that ARM did too
originally, but they learnt from their mistakes).

Oh well.

              Linus
pr-tracker-bot@kernel.org Oct. 4, 2019, 8:40 p.m. UTC | #2
The pull request you sent on Fri, 4 Oct 2019 10:36:54 -0700 (PDT):

> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.4-rc2

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/812ad49d88b51fab551acb3c2d9c7d054bc69423

Thank you!