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From: Chunfeng Yun <chunfeng.yun@mediatek.com>
To: Kishon Vijay Abraham I <kishon@ti.com>, Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [RESEND PATCH v3 02/11] dt-bindings: phy-mtk-tphy: make the ref clock optional
Date: Wed, 9 Oct 2019 15:40:25 +0800	[thread overview]
Message-ID: <1570606834-5644-2-git-send-email-chunfeng.yun@mediatek.com> (raw)
In-Reply-To: <1570606834-5644-1-git-send-email-chunfeng.yun@mediatek.com>

Make the ref clock optional, then we no need refer to a fixed-clock
in DTS anymore when the clock of USB3 PHY comes from oscillator
directly

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
---
v3: add acked-by Rob

v2: no changes
---
 .../devicetree/bindings/phy/phy-mtk-tphy.txt        | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
index ce6abfbdfbe1..1f4a36dd80e0 100644
--- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
@@ -34,12 +34,6 @@ Optional properties (controller (parent) node):
 
 Required properties (port (child) node):
 - reg		: address and length of the register set for the port.
-- clocks	: a list of phandle + clock-specifier pairs, one for each
-		  entry in clock-names
-- clock-names	: must contain
-		  "ref": 48M reference clock for HighSpeed analog phy; and 26M
-			reference clock for SuperSpeed analog phy, sometimes is
-			24M, 25M or 27M, depended on platform.
 - #phy-cells	: should be 1 (See second example)
 		  cell after port phandle is phy type from:
 			- PHY_TYPE_USB2
@@ -48,6 +42,13 @@ Required properties (port (child) node):
 			- PHY_TYPE_SATA
 
 Optional properties (PHY_TYPE_USB2 port (child) node):
+- clocks	: a list of phandle + clock-specifier pairs, one for each
+		  entry in clock-names
+- clock-names	: may contain
+		  "ref": 48M reference clock for HighSpeed anolog phy; and 26M
+			reference clock for SuperSpeed anolog phy, sometimes is
+			24M, 25M or 27M, depended on platform.
+
 - mediatek,eye-src	: u32, the value of slew rate calibrate
 - mediatek,eye-vrt	: u32, the selection of VRT reference voltage
 - mediatek,eye-term	: u32, the selection of HS_TX TERM reference voltage
-- 
2.23.0


  reply	other threads:[~2019-10-09  7:41 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-09  7:40 [RESEND PATCH v3 01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy Chunfeng Yun
2019-10-09  7:40 ` Chunfeng Yun [this message]
2019-10-09  7:40 ` [RESEND PATCH v3 03/11] dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
2019-10-09  7:40 ` [RESEND PATCH v3 04/11] dt-bindings: phy-mtk-tphy: add a new reference clock Chunfeng Yun
2019-10-09  7:40 ` [RESEND PATCH v3 05/11] dt-bindings: phy-mtk-tphy: add the properties about address mapping Chunfeng Yun
2019-10-09  7:40 ` [RESEND PATCH v3 06/11] phy: phy-mtk-tphy: add a property for disconnect threshold Chunfeng Yun
2019-10-09  7:40 ` [RESEND PATCH v3 07/11] phy: phy-mtk-tphy: add a property for internal resistance Chunfeng Yun
2019-10-09  7:40 ` [RESEND PATCH v3 08/11] phy: phy-mtk-tphy: make the ref clock optional Chunfeng Yun
2019-10-09  7:40 ` [RESEND PATCH v3 09/11] phy: phy-mtk-tphy: remove unused u3phya_ref clock Chunfeng Yun
2019-10-09  7:40 ` [RESEND PATCH v3 10/11] phy: phy-mtk-tphy: add a new reference clock Chunfeng Yun
2019-10-09  7:40 ` [RESEND PATCH v3 11/11] arm64: dts: mt2712: use non-empty ranges for usb-phy Chunfeng Yun

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