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From: Dave Martin <Dave.Martin@arm.com>
To: linux-kernel@vger.kernel.org
Cc: "Andrew Jones" <drjones@redhat.com>,
	"Arnd Bergmann" <arnd@arndb.de>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Eugene Syromiatnikov" <esyr@redhat.com>,
	"Florian Weimer" <fweimer@redhat.com>,
	"H.J. Lu" <hjl.tools@gmail.com>, "Jann Horn" <jannh@google.com>,
	"Kees Cook" <keescook@chromium.org>,
	"Kristina Martšenko" <kristina.martsenko@arm.com>,
	"Marc Zyngier" <maz@kernel.org>,
	"Mark Brown" <broonie@kernel.org>,
	"Paul Elliott" <paul.elliott@arm.com>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Sudakshina Das" <sudi.das@arm.com>,
	"Szabolcs Nagy" <szabolcs.nagy@arm.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Will Deacon" <will@kernel.org>,
	"Yu-cheng Yu" <yu-cheng.yu@intel.com>,
	"Amit Kachhap" <amit.kachhap@arm.com>,
	"Vincenzo Frascino" <vincenzo.frascino@arm.com>,
	linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 04/12] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1
Date: Fri, 18 Oct 2019 18:25:37 +0100	[thread overview]
Message-ID: <1571419545-20401-5-git-send-email-Dave.Martin@arm.com> (raw)
In-Reply-To: <1571419545-20401-1-git-send-email-Dave.Martin@arm.com>

Commit d71be2b6c0e1 ("arm64: cpufeature: Detect SSBS and advertise
to userspace") exposes ID_AA64PFR1_EL1 to userspace, but didn't
update the documentation to match.

Add it.

Signed-off-by: Dave Martin <Dave.Martin@arm.com>

---

Note to maintainers:

 * This patch has been racing with various other attempts to fix
   the same documentation in the meantime.

   Since this patch only fixes the documenting for pre-existing
   features, it can safely be dropped if appropriate.

   The _new_ documentation relating to BTI feature reporting
   is in a subsequent patch, and needs to be retained.
---
 Documentation/arm64/cpu-feature-registers.rst | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
index 2955287..b86828f 100644
--- a/Documentation/arm64/cpu-feature-registers.rst
+++ b/Documentation/arm64/cpu-feature-registers.rst
@@ -168,8 +168,15 @@ infrastructure:
      +------------------------------+---------+---------+
 
 
-  3) MIDR_EL1 - Main ID Register
+  3) ID_AA64PFR1_EL1 - Processor Feature Register 1
+     +------------------------------+---------+---------+
+     | Name                         |  bits   | visible |
+     +------------------------------+---------+---------+
+     | SSBS                         | [7-4]   |    y    |
+     +------------------------------+---------+---------+
+
 
+  4) MIDR_EL1 - Main ID Register
      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
      +------------------------------+---------+---------+
@@ -188,7 +195,7 @@ infrastructure:
    as available on the CPU where it is fetched and is not a system
    wide safe value.
 
-  4) ID_AA64ISAR1_EL1 - Instruction set attribute register 1
+  5) ID_AA64ISAR1_EL1 - Instruction set attribute register 1
 
      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
@@ -210,7 +217,7 @@ infrastructure:
      | DPB                          | [3-0]   |    y    |
      +------------------------------+---------+---------+
 
-  5) ID_AA64MMFR2_EL1 - Memory model feature register 2
+  6) ID_AA64MMFR2_EL1 - Memory model feature register 2
 
      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
@@ -218,7 +225,7 @@ infrastructure:
      | AT                           | [35-32] |    y    |
      +------------------------------+---------+---------+
 
-  6) ID_AA64ZFR0_EL1 - SVE feature ID register 0
+  7) ID_AA64ZFR0_EL1 - SVE feature ID register 0
 
      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
-- 
2.1.4


  parent reply	other threads:[~2019-10-18 17:27 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-18 17:25 [PATCH v3 00/12] arm64: ARMv8.5-A: Branch Target Identification support Dave Martin
2019-10-18 17:25 ` [PATCH v3 01/12] ELF: UAPI and Kconfig additions for ELF program properties Dave Martin
2019-10-29 23:07   ` Kees Cook
2019-10-18 17:25 ` [PATCH v3 02/12] ELF: Add ELF program property parsing support Dave Martin
2019-10-29 23:14   ` Kees Cook
2019-12-11 13:58     ` Mark Brown
2019-10-18 17:25 ` [PATCH v3 03/12] mm: Reserve asm-generic prot flag 0x10 for arch use Dave Martin
2019-10-18 17:25 ` Dave Martin [this message]
2019-10-18 17:25 ` [PATCH v3 05/12] arm64: Basic Branch Target Identification support Dave Martin
2019-10-18 17:25 ` [PATCH v3 06/12] elf: Allow arch to tweak initial mmap prot flags Dave Martin
2019-10-29 23:19   ` Kees Cook
2019-10-18 17:25 ` [PATCH v3 07/12] arm64: elf: Enable BTI at exec based on ELF program properties Dave Martin
2019-10-18 17:25 ` [PATCH v3 08/12] arm64: BTI: Decode BYTPE bits when printing PSTATE Dave Martin
2019-10-18 17:25 ` [PATCH v3 09/12] arm64: traps: Fix inconsistent faulting instruction skipping Dave Martin
2019-10-18 17:25 ` [PATCH v3 10/12] arm64: traps: Shuffle code to eliminate forward declarations Dave Martin
2019-10-18 17:25 ` [PATCH v3 11/12] arm64: BTI: Reset BTYPE when skipping emulated instructions Dave Martin
2019-10-18 17:25 ` [PATCH v3 12/12] KVM: " Dave Martin

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