From: Krishna Reddy <vdumpa@nvidia.com>
To: unlisted-recipients:; (no To-header on input)
Cc: <joro@8bytes.org>, <will@kernel.org>, <robin.murphy@arm.com>,
<linux-arm-kernel@lists.infradead.org>,
<iommu@lists.linux-foundation.org>,
<linux-kernel@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<treding@nvidia.com>, <yhsu@nvidia.com>, <snikam@nvidia.com>,
<praithatha@nvidia.com>, <talho@nvidia.com>,
<avanbrunt@nvidia.com>, <thomasz@nvidia.com>, <olof@lixom.net>,
<jtukkinen@nvidia.com>, <mperttunen@nvidia.com>,
<nicolinc@nvidia.com>, Krishna Reddy <vdumpa@nvidia.com>
Subject: [PATCH v3 7/7] arm64: tegra: enable SMMU for SDHCI and EQOS on T194
Date: Fri, 18 Oct 2019 16:31:32 -0700 [thread overview]
Message-ID: <1571441492-21919-8-git-send-email-vdumpa@nvidia.com> (raw)
In-Reply-To: <1571441492-21919-1-git-send-email-vdumpa@nvidia.com>
Enable SMMU translations for SDHCI and EQOS transactions on T194.
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 6f81e90..bf8ed7a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -3,6 +3,7 @@
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/tegra186-hsp.h>
+#include <dt-bindings/memory/tegra186-mc.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/power/tegra194-powergate.h>
#include <dt-bindings/reset/tegra194-reset.h>
@@ -51,6 +52,7 @@
clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
resets = <&bpmp TEGRA194_RESET_EQOS>;
reset-names = "eqos";
+ iommus = <&smmu TEGRA186_SID_EQOS>;
status = "disabled";
snps,write-requests = <1>;
@@ -413,6 +415,7 @@
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC1>;
reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC1>;
nvidia,pad-autocal-pull-up-offset-3v3-timeout =
<0x07>;
nvidia,pad-autocal-pull-down-offset-3v3-timeout =
@@ -435,6 +438,7 @@
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC3>;
reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC3>;
nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>;
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7a>;
nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
@@ -462,6 +466,7 @@
<&bpmp TEGRA194_CLK_PLLC4>;
resets = <&bpmp TEGRA194_RESET_SDMMC4>;
reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC4>;
nvidia,pad-autocal-pull-up-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-down-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x0a>;
--
2.7.4
next prev parent reply other threads:[~2019-10-18 23:31 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-18 23:31 [PATCH v3 0/7] Nvidia Arm SMMUv2 Implementation Krishna Reddy
2019-10-18 23:31 ` [PATCH v3 1/7] iommu/arm-smmu: prepare arm_smmu_flush_ops for override Krishna Reddy
2019-10-18 23:31 ` [PATCH v3 2/7] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage Krishna Reddy
2019-10-18 23:31 ` [PATCH v3 3/7] dt-bindings: arm-smmu: Add binding for Tegra194 SMMU Krishna Reddy
2019-10-22 17:56 ` Robin Murphy
2019-10-18 23:31 ` [PATCH v3 4/7] iommu/arm-smmu: Add global/context fault implementation hooks Krishna Reddy
2019-10-18 23:31 ` [PATCH v3 5/7] arm64: tegra: Add Memory controller DT node on T194 Krishna Reddy
2019-10-18 23:31 ` [PATCH v3 6/7] arm64: tegra: Add DT node for T194 SMMU Krishna Reddy
2019-10-18 23:31 ` Krishna Reddy [this message]
2019-10-22 17:52 ` [PATCH v3 0/7] Nvidia Arm SMMUv2 Implementation Robin Murphy
2019-10-22 23:48 ` Krishna Reddy
2019-10-23 16:27 ` Will Deacon
2019-10-23 16:53 ` Krishna Reddy
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