From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Nicolas Boichat <drinkcat@chromium.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh@kernel.org>
Cc: James Liao <jamesjj.liao@mediatek.com>,
Fan Chen <fan.chen@mediatek.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, Weiyi Lu <weiyi.lu@mediatek.com>,
Yong Wu <yong.wu@mediatek.com>
Subject: [PATCH v8 05/14] soc: mediatek: Refactor clock control
Date: Mon, 28 Oct 2019 10:48:09 +0800 [thread overview]
Message-ID: <1572230898-7860-6-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1572230898-7860-1-git-send-email-weiyi.lu@mediatek.com>
Put clock enable and disable control in separate function.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
drivers/soc/mediatek/mtk-scpsys.c | 45 ++++++++++++++++++++++++---------------
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
index aed540d..73e4a1a 100644
--- a/drivers/soc/mediatek/mtk-scpsys.c
+++ b/drivers/soc/mediatek/mtk-scpsys.c
@@ -207,6 +207,29 @@ static int scpsys_regulator_disable(struct scp_domain *scpd)
return regulator_disable(scpd->supply);
}
+static void scpsys_clk_disable(struct clk *clk[], int max_num)
+{
+ int i;
+
+ for (i = max_num - 1; i >= 0; i--)
+ clk_disable_unprepare(clk[i]);
+}
+
+static int scpsys_clk_enable(struct clk *clk[], int max_num)
+{
+ int i, ret = 0;
+
+ for (i = 0; i < max_num && clk[i]; i++) {
+ ret = clk_prepare_enable(clk[i]);
+ if (ret) {
+ scpsys_clk_disable(clk, i);
+ break;
+ }
+ }
+
+ return ret;
+}
+
static int scpsys_power_on(struct generic_pm_domain *genpd)
{
struct scp_domain *scpd = container_of(genpd, struct scp_domain, genpd);
@@ -215,21 +238,14 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
u32 pdn_ack = scpd->data->sram_pdn_ack_bits;
u32 val;
int ret, tmp;
- int i;
ret = scpsys_regulator_enable(scpd);
if (ret < 0)
return ret;
- for (i = 0; i < MAX_CLKS && scpd->clk[i]; i++) {
- ret = clk_prepare_enable(scpd->clk[i]);
- if (ret) {
- for (--i; i >= 0; i--)
- clk_disable_unprepare(scpd->clk[i]);
-
- goto err_clk;
- }
- }
+ ret = scpsys_clk_enable(scpd->clk, MAX_CLKS);
+ if (ret)
+ goto err_clk;
val = readl(ctl_addr);
val |= PWR_ON_BIT;
@@ -282,10 +298,7 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
return 0;
err_pwr_ack:
- for (i = MAX_CLKS - 1; i >= 0; i--) {
- if (scpd->clk[i])
- clk_disable_unprepare(scpd->clk[i]);
- }
+ scpsys_clk_disable(scpd->clk, MAX_CLKS);
err_clk:
scpsys_regulator_disable(scpd);
@@ -302,7 +315,6 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
u32 pdn_ack = scpd->data->sram_pdn_ack_bits;
u32 val;
int ret, tmp;
- int i;
if (scpd->data->bus_prot_mask) {
ret = mtk_infracfg_set_bus_protection(scp->infracfg,
@@ -343,8 +355,7 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
if (ret < 0)
goto out;
- for (i = 0; i < MAX_CLKS && scpd->clk[i]; i++)
- clk_disable_unprepare(scpd->clk[i]);
+ scpsys_clk_disable(scpd->clk, MAX_CLKS);
ret = scpsys_regulator_disable(scpd);
if (ret < 0)
--
1.8.1.1.dirty
next prev parent reply other threads:[~2019-10-28 2:48 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-28 2:48 [PATCH v8 00/14] Mediatek MT8183 scpsys support Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 01/14] dt-bindings: mediatek: Add property to mt8183 smi-common Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 02/14] dt-bindings: soc: Add MT8183 power dt-bindings Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 03/14] soc: mediatek: Refactor polling timeout and documentation Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 04/14] soc: mediatek: Refactor regulator control Weiyi Lu
2019-10-28 2:48 ` Weiyi Lu [this message]
2019-10-28 2:48 ` [PATCH v8 06/14] soc: mediatek: Refactor sram control Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 07/14] soc: mediatek: Refactor bus protection control Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 08/14] soc: mediatek: Add basic_clk_id to scp_power_data Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 09/14] soc: mediatek: Add multiple step bus protection control Weiyi Lu
2019-10-29 23:19 ` kbuild test robot
2019-10-30 1:36 ` kbuild test robot
2019-10-28 2:48 ` [PATCH v8 10/14] soc: mediatek: Add subsys clock control for bus protection Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 11/14] soc: mediatek: Add extra sram control Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 12/14] soc: mediatek: Add MT8183 scpsys support Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 13/14] arm64: dts: Add power controller device node of MT8183 Weiyi Lu
2019-10-28 2:48 ` [PATCH v8 14/14] arm64: dts: Add power-domains properity to mfgcfg Weiyi Lu
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