[v4,08/17] kvm: x86: Introduce APICv pre-update hook
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Message ID 1572648072-84536-9-git-send-email-suravee.suthikulpanit@amd.com
State Superseded
Headers show
Series
  • kvm: x86: Support AMD SVM AVIC w/ in-kernel irqchip mode
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Commit Message

Suthikulpanit, Suravee Nov. 1, 2019, 10:41 p.m. UTC
AMD SVM AVIC needs to update APIC backing page mapping before changing
APICv mode. Introduce struct kvm_x86_ops.pre_update_apicv_exec_ctrl
function hook to be called prior KVM APICv update request to each vcpu.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 arch/x86/include/asm/kvm_host.h | 1 +
 arch/x86/kvm/svm.c              | 6 ++++++
 arch/x86/kvm/x86.c              | 2 ++
 3 files changed, 9 insertions(+)

Comments

Roman Kagan Nov. 4, 2019, 10:05 p.m. UTC | #1
On Fri, Nov 01, 2019 at 10:41:31PM +0000, Suthikulpanit, Suravee wrote:
> AMD SVM AVIC needs to update APIC backing page mapping before changing
> APICv mode. Introduce struct kvm_x86_ops.pre_update_apicv_exec_ctrl
> function hook to be called prior KVM APICv update request to each vcpu.

This again seems to mix up APIC backing page and APIC access page.

And I must be missing something obvious, but why is it necessary to
unmap the APIC access page while AVIC is disabled?  Does keeping it
around stand in the way when working with AVIC disabled?

Thanks,
Roman.

> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
>  arch/x86/include/asm/kvm_host.h | 1 +
>  arch/x86/kvm/svm.c              | 6 ++++++
>  arch/x86/kvm/x86.c              | 2 ++
>  3 files changed, 9 insertions(+)
> 
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 3b94f42..f93d347 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -1094,6 +1094,7 @@ struct kvm_x86_ops {
>  	void (*enable_irq_window)(struct kvm_vcpu *vcpu);
>  	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
>  	bool (*get_enable_apicv)(struct kvm *kvm);
> +	void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate);
>  	void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
>  	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
>  	void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 46842a2..21203a6 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -7230,6 +7230,11 @@ static bool svm_need_emulation_on_page_fault(struct kvm_vcpu *vcpu)
>  	return false;
>  }
>  
> +static void svm_pre_update_apicv_exec_ctrl(struct kvm *kvm, bool activate)
> +{
> +	avic_update_access_page(kvm, activate);
> +}
> +
>  static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
>  	.cpu_has_kvm_support = has_svm,
>  	.disabled_by_bios = is_disabled,
> @@ -7307,6 +7312,7 @@ static bool svm_need_emulation_on_page_fault(struct kvm_vcpu *vcpu)
>  	.set_virtual_apic_mode = svm_set_virtual_apic_mode,
>  	.get_enable_apicv = svm_get_enable_apicv,
>  	.refresh_apicv_exec_ctrl = svm_refresh_apicv_exec_ctrl,
> +	.pre_update_apicv_exec_ctrl = svm_pre_update_apicv_exec_ctrl,
>  	.load_eoi_exitmap = svm_load_eoi_exitmap,
>  	.hwapic_irr_update = svm_hwapic_irr_update,
>  	.hwapic_isr_update = svm_hwapic_isr_update,
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 4fab93e..c09ff78 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -7755,6 +7755,8 @@ void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
>  	}
>  
>  	trace_kvm_apicv_update_request(activate, bit);
> +	if (kvm_x86_ops->pre_update_apicv_exec_ctrl)
> +		kvm_x86_ops->pre_update_apicv_exec_ctrl(kvm, activate);
>  	kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
>  }
>  EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
> -- 
> 1.8.3.1
>
Suthikulpanit, Suravee Nov. 12, 2019, 12:08 a.m. UTC | #2
Roman,

On 11/4/19 4:05 PM, Roman Kagan wrote:
> On Fri, Nov 01, 2019 at 10:41:31PM +0000, Suthikulpanit, Suravee wrote:
>> AMD SVM AVIC needs to update APIC backing page mapping before changing
>> APICv mode. Introduce struct kvm_x86_ops.pre_update_apicv_exec_ctrl
>> function hook to be called prior KVM APICv update request to each vcpu.
> This again seems to mix up APIC backing page and APIC access page.
> 
> And I must be missing something obvious, but why is it necessary to
> unmap the APIC access page while AVIC is disabled?  Does keeping it
> around stand in the way when working with AVIC disabled?

I have replied to patch 07/17 with explanation.

Yes, keeping the APIC access page while disabling AVIC would cause
the SVM to not function properly.

Thanks,
Suravee

> Thanks,
> Roman.
>
Roman Kagan Nov. 12, 2019, 11:12 a.m. UTC | #3
On Mon, Nov 11, 2019 at 06:08:05PM -0600, Suravee Suthikulpanit wrote:
> On 11/4/19 4:05 PM, Roman Kagan wrote:
> > On Fri, Nov 01, 2019 at 10:41:31PM +0000, Suthikulpanit, Suravee wrote:
> > > AMD SVM AVIC needs to update APIC backing page mapping before changing
> > > APICv mode. Introduce struct kvm_x86_ops.pre_update_apicv_exec_ctrl
> > > function hook to be called prior KVM APICv update request to each vcpu.
> > This again seems to mix up APIC backing page and APIC access page.
> > 
> > And I must be missing something obvious, but why is it necessary to
> > unmap the APIC access page while AVIC is disabled?  Does keeping it
> > around stand in the way when working with AVIC disabled?
> 
> I have replied to patch 07/17 with explanation.
> 
> Yes, keeping the APIC access page while disabling AVIC would cause
> the SVM to not function properly.

I wonder why?  Once AVIC is disabled guest access to this page would
trigger a regular NPT fault vmexit, just as it would with the NPT entry
for this page destroyed, wouldn't it?  So there would be no difference
from the host's POV.  Am I missing something?

Thanks,
Roman.

Patch
diff mbox series

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 3b94f42..f93d347 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1094,6 +1094,7 @@  struct kvm_x86_ops {
 	void (*enable_irq_window)(struct kvm_vcpu *vcpu);
 	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
 	bool (*get_enable_apicv)(struct kvm *kvm);
+	void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate);
 	void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
 	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
 	void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 46842a2..21203a6 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -7230,6 +7230,11 @@  static bool svm_need_emulation_on_page_fault(struct kvm_vcpu *vcpu)
 	return false;
 }
 
+static void svm_pre_update_apicv_exec_ctrl(struct kvm *kvm, bool activate)
+{
+	avic_update_access_page(kvm, activate);
+}
+
 static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
 	.cpu_has_kvm_support = has_svm,
 	.disabled_by_bios = is_disabled,
@@ -7307,6 +7312,7 @@  static bool svm_need_emulation_on_page_fault(struct kvm_vcpu *vcpu)
 	.set_virtual_apic_mode = svm_set_virtual_apic_mode,
 	.get_enable_apicv = svm_get_enable_apicv,
 	.refresh_apicv_exec_ctrl = svm_refresh_apicv_exec_ctrl,
+	.pre_update_apicv_exec_ctrl = svm_pre_update_apicv_exec_ctrl,
 	.load_eoi_exitmap = svm_load_eoi_exitmap,
 	.hwapic_irr_update = svm_hwapic_irr_update,
 	.hwapic_isr_update = svm_hwapic_isr_update,
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 4fab93e..c09ff78 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -7755,6 +7755,8 @@  void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
 	}
 
 	trace_kvm_apicv_update_request(activate, bit);
+	if (kvm_x86_ops->pre_update_apicv_exec_ctrl)
+		kvm_x86_ops->pre_update_apicv_exec_ctrl(kvm, activate);
 	kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
 }
 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);