From: Paul Walmsley <paul.walmsley@sifive.com>
To: torvalds@linux-foundation.org
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [GIT PULL] RISC-V updates for v5.4-rc6
Date: Fri, 1 Nov 2019 17:10:16 -0700 (PDT) [thread overview]
Message-ID: <alpine.DEB.2.21.9999.1911011707090.16921@viisi.sifive.com> (raw)
Linus,
The following changes since commit d6d5df1db6e9d7f8f76d2911707f7d5877251b02:
Linux 5.4-rc5 (2019-10-27 13:19:19 -0400)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.4-rc6
for you to fetch changes up to 1d9b0b66c3ef03e42db63068e1a4e7250992e2b1:
MAINTAINERS: Change to my personal email address (2019-10-30 01:03:34 -0700)
----------------------------------------------------------------
RISC-V updates for v5.4-rc6
One fix for PCIe users:
- Fix legacy PCI I/O port access emulation
One set of cleanups:
- Resolve most of the warnings generated by sparse across arch/riscv.
No functional changes
And one MAINTAINERS update:
- Update Palmer's E-mail address
----------------------------------------------------------------
Palmer Dabbelt (1):
MAINTAINERS: Change to my personal email address
Paul Walmsley (6):
riscv: add prototypes for assembly language functions from head.S
riscv: init: merge split string literals in preprocessor directive
riscv: mark some code and data as file-static
riscv: add missing header file includes
riscv: fp: add missing __user pointer annotations
riscv: for C functions called only from assembly, mark with __visible
Yash Shah (1):
RISC-V: Add PCIe I/O BAR memory mapping
MAINTAINERS | 6 +++---
arch/riscv/include/asm/io.h | 7 +++++++
arch/riscv/include/asm/irq.h | 3 +++
arch/riscv/include/asm/pgtable.h | 7 ++++++-
arch/riscv/include/asm/switch_to.h | 1 +
arch/riscv/kernel/cpufeature.c | 1 +
arch/riscv/kernel/head.h | 21 +++++++++++++++++++++
arch/riscv/kernel/irq.c | 2 +-
arch/riscv/kernel/module-sections.c | 1 +
arch/riscv/kernel/process.c | 2 ++
arch/riscv/kernel/ptrace.c | 4 ++--
arch/riscv/kernel/reset.c | 1 +
arch/riscv/kernel/setup.c | 2 ++
arch/riscv/kernel/signal.c | 8 ++++----
arch/riscv/kernel/smp.c | 2 ++
arch/riscv/kernel/smpboot.c | 5 ++++-
arch/riscv/kernel/syscall_table.c | 1 +
arch/riscv/kernel/time.c | 1 +
arch/riscv/kernel/traps.c | 5 +++--
arch/riscv/kernel/vdso.c | 3 ++-
arch/riscv/mm/context.c | 1 +
arch/riscv/mm/fault.c | 2 ++
arch/riscv/mm/init.c | 5 +++--
arch/riscv/mm/sifive_l2_cache.c | 2 +-
24 files changed, 75 insertions(+), 18 deletions(-)
create mode 100644 arch/riscv/kernel/head.h
next reply other threads:[~2019-11-02 0:10 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-02 0:10 Paul Walmsley [this message]
2019-11-02 0:25 ` [GIT PULL] RISC-V updates for v5.4-rc6 pr-tracker-bot
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