From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, james.morse@arm.com,
will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com,
maz@kernel.org, suzuki.poulose@arm.com
Subject: [PATCH 1/5] arm64: Add MIDR encoding for Arm Cortex-A77
Date: Thu, 14 Nov 2019 14:59:14 +0000 [thread overview]
Message-ID: <20191114145918.235339-2-suzuki.poulose@arm.com> (raw)
In-Reply-To: <20191114145918.235339-1-suzuki.poulose@arm.com>
From: James Morse <james.morse@arm.com>
Add Arm Cortex-A77's part-number so we can match against its MIDR_EL1.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm64/include/asm/cputype.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index aca07c2f6e6e..3c8c1580527d 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -71,6 +71,7 @@
#define ARM_CPU_PART_CORTEX_A55 0xD05
#define ARM_CPU_PART_CORTEX_A76 0xD0B
#define ARM_CPU_PART_NEOVERSE_N1 0xD0C
+#define ARM_CPU_PART_CORTEX_A77 0xD0D
#define APM_CPU_PART_POTENZA 0x000
@@ -101,6 +102,7 @@
#define MIDR_CORTEX_A35 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A35)
#define MIDR_CORTEX_A55 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A55)
#define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
+#define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
--
2.23.0
next prev parent reply other threads:[~2019-11-14 15:00 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-14 14:59 [PATCH 0/5] arm64: Add workaround for Cortex-A77 erratum 1542418 Suzuki K Poulose
2019-11-14 14:59 ` Suzuki K Poulose [this message]
2019-11-14 14:59 ` [PATCH 2/5] arm64: mm: Workaround Cortex-A77 erratum 1542418 on ASID rollover Suzuki K Poulose
2019-11-14 14:59 ` [PATCH 3/5] arm64: Workaround Cortex-A77 erratum 1542418 on boot due to kexec Suzuki K Poulose
2019-11-14 14:59 ` [PATCH 4/5] KVM: arm64: Workaround Cortex-A77 erratum 1542418 on VMID rollover Suzuki K Poulose
2019-11-14 14:59 ` [PATCH 5/5] KVM: arm/arm64: Don't invoke defacto-CnP on first run Suzuki K Poulose
2019-11-14 16:39 ` [PATCH 0/5] arm64: Add workaround for Cortex-A77 erratum 1542418 Will Deacon
2019-11-15 1:14 ` Suzuki K Poulose
2019-11-20 19:18 ` Will Deacon
2020-04-08 10:09 ` Will Deacon
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