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From: Gayatri Kammela <gayatri.kammela@intel.com>
To: platform-driver-x86@vger.kernel.org
Cc: vishwanath.somayaji@intel.com, dvhart@infradead.org,
	linux-kernel@vger.kernel.org, charles.d.prestopine@intel.com,
	Gayatri Kammela <gayatri.kammela@intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Srinivas Pandruvada <srinivas.pandruvada@intel.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Kan Liang <kan.liang@intel.com>,
	"David E . Box" <david.e.box@intel.com>,
	Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>,
	Tony Luck <tony.luck@intel.com>
Subject: [PATCH v3 7/7] platform/x86: Add Comet Lake (CML) platform support to intel_pmc_core driver
Date: Thu, 14 Nov 2019 09:01:20 -0800	[thread overview]
Message-ID: <d43af9c7b3c536c489cdb925adb2204256099952.1573750525.git.gayatri.kammela@intel.com> (raw)
In-Reply-To: <cover.1573750525.git.gayatri.kammela@intel.com>
In-Reply-To: <cover.1573750525.git.gayatri.kammela@intel.com>

Add Comet Lake to the list of the platforms that intel_pmc_core driver
supports for pmc_core device.

Just like Ice Lake, Tiger Lake and Elkhart Lake, Comet Lake can also
reuse all the Cannon Lake PCH IPs. No additional effort is needed to
enable but to simply reuse them.

Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Kan Liang <kan.liang@intel.com>
Cc: David E. Box <david.e.box@intel.com>
Cc: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com>
---
 drivers/platform/x86/intel_pmc_core.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
index 94081710e0de..a9b33ac4e52d 100644
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel_pmc_core.c
@@ -165,6 +165,7 @@ static const struct pmc_reg_map spt_reg_map = {
 
 /* Cannon Lake: PGD PFET Enable Ack Status Register(s) bitmap */
 static const struct pmc_bit_map cnp_pfear_map[] = {
+	/* Reserved for Cannon Lake but valid for Comet Lake */
 	{"PMC",                 BIT(0)},
 	{"OPI-DMI",             BIT(1)},
 	{"SPI/eSPI",            BIT(2)},
@@ -879,6 +880,8 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = {
 	INTEL_CPU_FAM6(TIGERLAKE_L, tgl_reg_map),
 	INTEL_CPU_FAM6(TIGERLAKE, tgl_reg_map),
 	INTEL_CPU_FAM6(ATOM_TREMONT, tgl_reg_map),
+	INTEL_CPU_FAM6(COMETLAKE, cnp_reg_map),
+	INTEL_CPU_FAM6(COMETLAKE_L, cnp_reg_map),
 	{}
 };
 
-- 
2.17.1


  parent reply	other threads:[~2019-11-14 17:01 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-14 17:01 [PATCH v3 0/7] x86/intel_pmc_core: Add Tiger Lake, Elkhart Lake Gayatri Kammela
2019-11-14 17:01 ` [PATCH v3 1/7] x86/intel_pmc_core: Fix the SoC naming inconsistency Gayatri Kammela
2019-11-14 17:01 ` [PATCH v3 2/7] x86/intel_pmc_core: Clean up: Remove comma after the termination line Gayatri Kammela
2019-11-14 17:01 ` [PATCH v3 3/7] x86/intel_pmc_core: Create platform dependent pmc bitmap structs Gayatri Kammela
2019-11-14 17:01 ` [PATCH v3 4/7] x86/intel_pmc_core: Make debugfs entry for pch_ip_power_gating_status conditional Gayatri Kammela
2019-11-14 17:01 ` [PATCH v3 5/7] platform/x86: Add Tiger Lake (TGL) platform support to intel_pmc_core driver Gayatri Kammela
2019-11-14 17:01 ` [PATCH v3 6/7] platform/x86: Add Atom based Elkhart Lake (EHL) " Gayatri Kammela
2019-11-14 17:01 ` Gayatri Kammela [this message]
2019-11-14 18:50   ` [PATCH v3 7/7] platform/x86: Add Comet Lake (CML) " Mario.Limonciello
2019-11-18 18:06     ` Kammela, Gayatri
2019-11-18 10:50 ` [PATCH v3 0/7] x86/intel_pmc_core: Add Tiger Lake, Elkhart Lake Andy Shevchenko
2019-11-18 18:11   ` Kammela, Gayatri
2019-11-18 18:18     ` Mario.Limonciello
2019-11-18 19:12       ` Kammela, Gayatri
2019-11-18 18:23     ` Andy Shevchenko
2019-11-18 19:15       ` Kammela, Gayatri

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