From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: narmstrong@baylibre.com, jbrunet@baylibre.com,
linux-amlogic@lists.infradead.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Rob Herring <robh@kernel.org>
Subject: [PATCH v3 1/5] dt-bindings: clock: meson8b: add the clock inputs
Date: Sun, 17 Nov 2019 14:59:23 +0100 [thread overview]
Message-ID: <20191117135927.135428-2-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20191117135927.135428-1-martin.blumenstingl@googlemail.com>
The clock controller on Meson8/Meson8b/Meson8m2 has three (known)
inputs:
- "xtal": the main 24MHz crystal
- "ddr_pll": some of the audio clocks use the output of the DDR PLL as
input
- "clk_32k": an optional clock signal which can be connected to GPIOAO_6
(which then has to be switched to the CLK_32K_IN function)
Add the inputs to the documentation so we can wire up these inputs in a
follow-up patch.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
.../devicetree/bindings/clock/amlogic,meson8b-clkc.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
index 4d94091c1d2d..cc51e4746b3b 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
+++ b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
@@ -11,6 +11,11 @@ Required Properties:
- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
- #clock-cells: should be 1.
- #reset-cells: should be 1.
+- clocks: list of clock phandles, one for each entry in clock-names
+- clock-names: should contain the following:
+ * "xtal": the 24MHz system oscillator
+ * "ddr_pll": the DDR PLL clock
+ * "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)
Parent node should have the following properties :
- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
--
2.24.0
next prev parent reply other threads:[~2019-11-17 14:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-17 13:59 [PATCH v3 0/5] provide the XTAL clock via OF on Meson8/8b/8m2 Martin Blumenstingl
2019-11-17 13:59 ` Martin Blumenstingl [this message]
2019-11-17 13:59 ` [PATCH v3 2/5] clk: meson: meson8b: use clk_hw_set_parent in the CPU clock notifier Martin Blumenstingl
2019-11-17 13:59 ` [PATCH v3 3/5] clk: meson: meson8b: change references to the XTAL clock to use [fw_]name Martin Blumenstingl
2019-11-17 13:59 ` [PATCH v3 4/5] clk: meson: meson8b: don't register the XTAL clock when provided via OF Martin Blumenstingl
2019-11-17 13:59 ` [PATCH v3 5/5] clk: meson: meson8b: use of_clk_hw_register to register the clocks Martin Blumenstingl
2019-11-18 9:55 ` [PATCH v3 0/5] provide the XTAL clock via OF on Meson8/8b/8m2 Jerome Brunet
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