From: Rasmus Villemoes <linux@rasmusvillemoes.dk>
To: Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
Christophe Leroy <christophe.leroy@c-s.fr>
Cc: linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Scott Wood <oss@buserror.net>,
Timur Tabi <timur@kernel.org>,
Rasmus Villemoes <linux@rasmusvillemoes.dk>
Subject: [PATCH v5 40/48] soc: fsl: qe: avoid IS_ERR_VALUE in ucc_slow.c
Date: Mon, 18 Nov 2019 12:23:16 +0100 [thread overview]
Message-ID: <20191118112324.22725-41-linux@rasmusvillemoes.dk> (raw)
In-Reply-To: <20191118112324.22725-1-linux@rasmusvillemoes.dk>
When trying to build this for a 64-bit platform, one gets warnings
from using IS_ERR_VALUE on something which is not sizeof(long).
Instead, change the various *_offset fields to store a signed integer,
and simply check for a negative return from qe_muram_alloc(). Since
qe_muram_free() now accepts and ignores a negative argument, we only
need to make sure these fields are initialized with -1, and we can
just unconditionally call qe_muram_free() in ucc_slow_free().
Note that the error case for us_pram_offset failed to set that field
to 0 (which, as noted earlier, is anyway a bogus sentinel value).
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
---
drivers/soc/fsl/qe/ucc_slow.c | 22 +++++++++-------------
include/soc/fsl/qe/ucc_slow.h | 6 +++---
2 files changed, 12 insertions(+), 16 deletions(-)
diff --git a/drivers/soc/fsl/qe/ucc_slow.c b/drivers/soc/fsl/qe/ucc_slow.c
index 9b55fd0f50c6..274d34449846 100644
--- a/drivers/soc/fsl/qe/ucc_slow.c
+++ b/drivers/soc/fsl/qe/ucc_slow.c
@@ -154,6 +154,9 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
__func__);
return -ENOMEM;
}
+ uccs->rx_base_offset = -1;
+ uccs->tx_base_offset = -1;
+ uccs->us_pram_offset = -1;
/* Fill slow UCC structure */
uccs->us_info = us_info;
@@ -179,7 +182,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
/* Get PRAM base */
uccs->us_pram_offset =
qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM);
- if (IS_ERR_VALUE(uccs->us_pram_offset)) {
+ if (uccs->us_pram_offset < 0) {
printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __func__);
ucc_slow_free(uccs);
return -ENOMEM;
@@ -206,10 +209,9 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
uccs->rx_base_offset =
qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd),
QE_ALIGNMENT_OF_BD);
- if (IS_ERR_VALUE(uccs->rx_base_offset)) {
+ if (uccs->rx_base_offset < 0) {
printk(KERN_ERR "%s: cannot allocate %u RX BDs\n", __func__,
us_info->rx_bd_ring_len);
- uccs->rx_base_offset = 0;
ucc_slow_free(uccs);
return -ENOMEM;
}
@@ -217,9 +219,8 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
uccs->tx_base_offset =
qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd),
QE_ALIGNMENT_OF_BD);
- if (IS_ERR_VALUE(uccs->tx_base_offset)) {
+ if (uccs->tx_base_offset < 0) {
printk(KERN_ERR "%s: cannot allocate TX BDs", __func__);
- uccs->tx_base_offset = 0;
ucc_slow_free(uccs);
return -ENOMEM;
}
@@ -352,14 +353,9 @@ void ucc_slow_free(struct ucc_slow_private * uccs)
if (!uccs)
return;
- if (uccs->rx_base_offset)
- qe_muram_free(uccs->rx_base_offset);
-
- if (uccs->tx_base_offset)
- qe_muram_free(uccs->tx_base_offset);
-
- if (uccs->us_pram)
- qe_muram_free(uccs->us_pram_offset);
+ qe_muram_free(uccs->rx_base_offset);
+ qe_muram_free(uccs->tx_base_offset);
+ qe_muram_free(uccs->us_pram_offset);
if (uccs->us_regs)
iounmap(uccs->us_regs);
diff --git a/include/soc/fsl/qe/ucc_slow.h b/include/soc/fsl/qe/ucc_slow.h
index 8696fdea2ae9..d187a6be83bc 100644
--- a/include/soc/fsl/qe/ucc_slow.h
+++ b/include/soc/fsl/qe/ucc_slow.h
@@ -185,7 +185,7 @@ struct ucc_slow_private {
struct ucc_slow_info *us_info;
struct ucc_slow __iomem *us_regs; /* Ptr to memory map of UCC regs */
struct ucc_slow_pram *us_pram; /* a pointer to the parameter RAM */
- u32 us_pram_offset;
+ s32 us_pram_offset;
int enabled_tx; /* Whether channel is enabled for Tx (ENT) */
int enabled_rx; /* Whether channel is enabled for Rx (ENR) */
int stopped_tx; /* Whether channel has been stopped for Tx
@@ -194,8 +194,8 @@ struct ucc_slow_private {
struct list_head confQ; /* frames passed to chip waiting for tx */
u32 first_tx_bd_mask; /* mask is used in Tx routine to save status
and length for first BD in a frame */
- u32 tx_base_offset; /* first BD in Tx BD table offset (In MURAM) */
- u32 rx_base_offset; /* first BD in Rx BD table offset (In MURAM) */
+ s32 tx_base_offset; /* first BD in Tx BD table offset (In MURAM) */
+ s32 rx_base_offset; /* first BD in Rx BD table offset (In MURAM) */
struct qe_bd *confBd; /* next BD for confirm after Tx */
struct qe_bd *tx_bd; /* next BD for new Tx request */
struct qe_bd *rx_bd; /* next BD to collect after Rx */
--
2.23.0
next prev parent reply other threads:[~2019-11-18 11:25 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-18 11:22 [PATCH v5 00/48] QUICC Engine support on ARM, ARM64, PPC64 Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 01/48] soc: fsl: qe: remove space-before-tab Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 02/48] soc: fsl: qe: drop volatile qualifier of struct qe_ic::regs Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 03/48] soc: fsl: qe: rename qe_(clr/set/clrset)bit* helpers Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 04/48] soc: fsl: qe: introduce qe_io{read,write}* wrappers Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 05/48] soc: fsl: qe: avoid ppc-specific io accessors Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 06/48] soc: fsl: qe: replace spin_event_timeout by readx_poll_timeout_atomic Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 07/48] soc: fsl: qe: qe.c: guard use of pvr_version_is() with CONFIG_PPC32 Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 08/48] soc: fsl: qe: drop unneeded #includes Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 09/48] soc: fsl: qe: drop assign-only high_active in qe_ic_init Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 10/48] soc: fsl: qe: remove pointless sysfs registration in qe_ic.c Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 11/48] soc: fsl: qe: use qe_ic_cascade_{low,high}_mpic also on 83xx Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 12/48] soc: fsl: qe: move calls of qe_ic_init out of arch/powerpc/ Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 13/48] powerpc/83xx: remove mpc83xx_ipic_and_qe_init_IRQ Rasmus Villemoes
2019-11-20 17:59 ` Li Yang
2019-11-22 7:23 ` Scott Wood
2019-11-18 11:22 ` [PATCH v5 14/48] powerpc/85xx: remove mostly pointless mpc85xx_qe_init() Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 15/48] soc: fsl: qe: move qe_ic_cascade_* functions to qe_ic.c Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 16/48] soc: fsl: qe: rename qe_ic_cascade_low_mpic -> qe_ic_cascade_low Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 17/48] soc: fsl: qe: remove unused qe_ic_set_* functions Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 18/48] soc: fsl: qe: don't use NO_IRQ in qe_ic.c Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 19/48] soc: fsl: qe: make qe_ic_get_{low,high}_irq static Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 20/48] soc: fsl: qe: simplify qe_ic_init() Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 21/48] soc: fsl: qe: merge qe_ic.h headers into qe_ic.c Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 22/48] soc: fsl: qe: qe.c: use of_property_read_* helpers Rasmus Villemoes
2019-11-18 11:22 ` [PATCH v5 23/48] soc: fsl: qe: qe_io.c: don't open-code of_parse_phandle() Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 24/48] soc: fsl: qe: qe_io.c: access device tree property using be32_to_cpu Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 25/48] soc: fsl: qe: qe_io.c: use of_property_read_u32() in par_io_init() Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 26/48] soc: fsl: move cpm.h from powerpc/include/asm to include/soc/fsl Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 27/48] soc/fsl/qe/qe.h: update include path for cpm.h Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 28/48] serial: ucc_uart: explicitly include soc/fsl/cpm.h Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 29/48] serial: ucc_uart: replace ppc-specific IO accessors Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 30/48] serial: ucc_uart: factor out soft_uart initialization Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 31/48] serial: ucc_uart: stub out soft_uart_init for !CONFIG_PPC32 Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 32/48] serial: ucc_uart: use of_property_read_u32() in ucc_uart_probe() Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 33/48] serial: ucc_uart: limit brg-frequency workaround to PPC32 Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 34/48] serial: ucc_uart: access __be32 field using be32_to_cpu Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 35/48] soc: fsl: qe: change return type of cpm_muram_alloc() to s32 Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 36/48] soc: fsl: qe: make cpm_muram_free() return void Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 37/48] soc: fsl: qe: make cpm_muram_free() ignore a negative offset Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 38/48] soc: fsl: qe: drop broken lazy call of cpm_muram_init() Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 39/48] soc: fsl: qe: refactor cpm_muram_alloc_common to prevent BUG on error path Rasmus Villemoes
2019-11-18 11:23 ` Rasmus Villemoes [this message]
2019-11-18 11:23 ` [PATCH v5 41/48] soc: fsl: qe: drop use of IS_ERR_VALUE in qe_sdma_init() Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 42/48] soc: fsl: qe: drop pointless check " Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 43/48] soc: fsl: qe: avoid IS_ERR_VALUE in ucc_fast.c Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 44/48] net/wan/fsl_ucc_hdlc: avoid use of IS_ERR_VALUE() Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 45/48] net/wan/fsl_ucc_hdlc: fix reading of __be16 registers Rasmus Villemoes
2019-11-20 17:52 ` Li Yang
2019-11-18 11:23 ` [PATCH v5 46/48] net/wan/fsl_ucc_hdlc: reject muram offsets above 64K Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 47/48] net: ethernet: freescale: make UCC_GETH explicitly depend on PPC32 Rasmus Villemoes
2019-11-18 11:23 ` [PATCH v5 48/48] soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINE Rasmus Villemoes
2019-11-20 3:55 ` [PATCH v5 00/48] QUICC Engine support on ARM, ARM64, PPC64 Timur Tabi
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