From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
To: linux-snps-arc@lists.infradead.org,
Vineet Gupta <Vineet.Gupta1@synopsys.com>
Cc: linux-kernel@vger.kernel.org,
Alexey Brodkin <Alexey.Brodkin@synopsys.com>,
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Subject: [PATCH 1/2] ARC: [plat-axs10x]: use pgu pll instead of fixed clock
Date: Tue, 19 Nov 2019 16:22:14 +0300 [thread overview]
Message-ID: <20191119132215.3011-1-Eugeniy.Paltsev@synopsys.com> (raw)
Use PLL driver instead of fixed-clock for PGU pixel clock.
That allows us to support wider range of graphic modes.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
---
arch/arc/boot/dts/axs10x_mb.dtsi | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 08bcfed6b80f..f9a5c9ddcae7 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -61,12 +61,13 @@
clock-frequency = <25000000>;
#clock-cells = <0>;
};
+ };
- pguclk: pguclk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <74250000>;
- };
+ pguclk: pguclk@10080 {
+ compatible = "snps,axs10x-pgu-pll-clock";
+ reg = <0x10080 0x10>, <0x110 0x10>;
+ #clock-cells = <0>;
+ clocks = <&input_clk>;
};
gmac: ethernet@18000 {
--
2.21.0
next reply other threads:[~2019-11-19 13:22 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-19 13:22 Eugeniy Paltsev [this message]
2019-11-19 13:22 ` [PATCH 2/2] ARC: [plat-axs10x]: remove hardcoded video mode from bootargs Eugeniy Paltsev
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