From: Fenghua Yu <fenghua.yu@intel.com>
To: "Thomas Gleixner" <tglx@linutronix.de>,
"Ingo Molnar" <mingo@redhat.com>,
"Borislav Petkov" <bp@alien8.de>, "H Peter Anvin" <hpa@zytor.com>,
"Andy Lutomirski" <luto@kernel.org>,
"Peter Zijlstra" <peterz@infradead.org>,
"David Laight" <David.Laight@ACULAB.COM>,
"Ashok Raj" <ashok.raj@intel.com>,
"Tony Luck" <tony.luck@intel.com>,
"Ravi V Shankar" <ravi.v.shankar@intel.com>
Cc: "linux-kernel" <linux-kernel@vger.kernel.org>,
"x86" <x86@kernel.org>, Fenghua Yu <fenghua.yu@intel.com>
Subject: [PATCH v2 3/4] mtd: rawnand: fsmc: Change to non-atomic bit operations
Date: Mon, 25 Nov 2019 11:43:03 -0800 [thread overview]
Message-ID: <1574710984-208305-4-git-send-email-fenghua.yu@intel.com> (raw)
In-Reply-To: <1574710984-208305-1-git-send-email-fenghua.yu@intel.com>
No need for expensive atomic change_bit() on the local variable err_idx[].
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
---
drivers/mtd/nand/raw/fsmc_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index a6964feeec77..916496d4ecf2 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -809,8 +809,8 @@ static int fsmc_bch8_correct_data(struct nand_chip *chip, u8 *dat,
i = 0;
while (num_err--) {
- change_bit(0, (unsigned long *)&err_idx[i]);
- change_bit(1, (unsigned long *)&err_idx[i]);
+ __change_bit(0, (unsigned long *)&err_idx[i]);
+ __change_bit(1, (unsigned long *)&err_idx[i]);
if (err_idx[i] < chip->ecc.size * 8) {
change_bit(err_idx[i], (unsigned long *)dat);
--
2.19.1
next prev parent reply other threads:[~2019-11-25 19:31 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-25 19:43 [PATCH v2 0/4] Fix some 4-byte vs. 8-byte alignment issues in atomic bit operations Fenghua Yu
2019-11-25 19:43 ` [PATCH v2 1/4] drivers/net/b44: Change to non-atomic " Fenghua Yu
2019-11-26 9:49 ` David Laight
2019-12-04 15:19 ` Peter Zijlstra
2019-11-25 19:43 ` [PATCH v2 2/4] xen-pcifront: Align address of flags to size of unsigned long Fenghua Yu
2019-11-26 9:53 ` David Laight
2019-11-26 10:02 ` Jürgen Groß
2019-12-02 18:28 ` Luck, Tony
2019-12-02 22:29 ` Fenghua Yu
2019-11-25 19:43 ` Fenghua Yu [this message]
2019-12-04 15:28 ` [PATCH v2 3/4] mtd: rawnand: fsmc: Change to non-atomic bit operations Peter Zijlstra
2019-11-25 19:43 ` [PATCH v2 4/4] x86/mce: Force alignment for atomic " Fenghua Yu
2019-11-26 10:13 ` [PATCH v2 0/4] Fix some 4-byte vs. 8-byte alignment issues in " David Laight
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1574710984-208305-4-git-send-email-fenghua.yu@intel.com \
--to=fenghua.yu@intel.com \
--cc=David.Laight@ACULAB.COM \
--cc=ashok.raj@intel.com \
--cc=bp@alien8.de \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=luto@kernel.org \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=ravi.v.shankar@intel.com \
--cc=tglx@linutronix.de \
--cc=tony.luck@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).