From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Nicolas Boichat <drinkcat@chromium.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh@kernel.org>
Cc: James Liao <jamesjj.liao@mediatek.com>,
Fan Chen <fan.chen@mediatek.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, Weiyi Lu <weiyi.lu@mediatek.com>,
Yong Wu <yong.wu@mediatek.com>
Subject: [PATCH v9 3/9] soc: mediatek: Add basic_clk_id to scp_power_data
Date: Tue, 10 Dec 2019 14:46:47 +0800 [thread overview]
Message-ID: <1575960413-6900-4-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1575960413-6900-1-git-send-email-weiyi.lu@mediatek.com>
Try to stop extending the clk_id or clk_names if there are
more and more new BASIC clocks. To get its own clocks by the
basic_clk_id of each power domain.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
drivers/soc/mediatek/mtk-scpsys.c | 29 +++++++++++++++++++++--------
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
index f669d37..915d635 100644
--- a/drivers/soc/mediatek/mtk-scpsys.c
+++ b/drivers/soc/mediatek/mtk-scpsys.c
@@ -117,6 +117,8 @@ enum clk_id {
* @sram_pdn_ack_bits: The mask for sram power control acked bits.
* @bus_prot_mask: The mask for single step bus protection.
* @clk_id: The basic clocks required by this power domain.
+ * @basic_clk_id: provide the same purpose with field "clk_id"
+ * by declaring basic clock prefix name rather than clk_id.
* @caps: The flag for active wake-up action.
*/
struct scp_domain_data {
@@ -127,6 +129,7 @@ struct scp_domain_data {
u32 sram_pdn_ack_bits;
u32 bus_prot_mask;
enum clk_id clk_id[MAX_CLKS];
+ const char *basic_clk_id[MAX_CLKS];
u8 caps;
};
@@ -493,16 +496,26 @@ static struct scp *init_scp(struct platform_device *pdev,
scpd->data = data;
- for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) {
- struct clk *c = clk[data->clk_id[j]];
+ if (data->clk_id[0]) {
+ WARN_ON(data->basic_clk_id[0]);
- if (IS_ERR(c)) {
- dev_err(&pdev->dev, "%s: clk unavailable\n",
- data->name);
- return ERR_CAST(c);
- }
+ for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) {
+ struct clk *c = clk[data->clk_id[j]];
+
+ if (IS_ERR(c)) {
+ dev_err(&pdev->dev,
+ "%s: clk unavailable\n",
+ data->name);
+ return ERR_CAST(c);
+ }
- scpd->clk[j] = c;
+ scpd->clk[j] = c;
+ }
+ } else if (data->basic_clk_id[0]) {
+ for (j = 0; j < MAX_CLKS &&
+ data->basic_clk_id[j]; j++)
+ scpd->clk[j] = devm_clk_get(&pdev->dev,
+ data->basic_clk_id[j]);
}
genpd->name = data->name;
--
1.8.1.1.dirty
next prev parent reply other threads:[~2019-12-10 6:47 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-10 6:46 [PATCH v9 0/9] Mediatek MT8183 scpsys support Weiyi Lu
2019-12-10 6:46 ` [PATCH v9 1/9] dt-bindings: mediatek: Add property to mt8183 smi-common Weiyi Lu
2019-12-10 6:46 ` [PATCH v9 2/9] dt-bindings: soc: Add MT8183 power dt-bindings Weiyi Lu
2019-12-10 6:46 ` Weiyi Lu [this message]
2019-12-16 7:01 ` [PATCH v9 3/9] soc: mediatek: Add basic_clk_id to scp_power_data Nicolas Boichat
2019-12-17 2:50 ` Weiyi Lu
2019-12-10 6:46 ` [PATCH v9 4/9] soc: mediatek: Add multiple step bus protection control Weiyi Lu
2019-12-16 7:21 ` Nicolas Boichat
2019-12-17 2:50 ` Weiyi Lu
2019-12-17 5:33 ` Nicolas Boichat
2019-12-18 2:25 ` Weiyi Lu
2019-12-19 3:42 ` Nicolas Boichat
2019-12-10 6:46 ` [PATCH v9 5/9] soc: mediatek: Add subsys clock control for bus protection Weiyi Lu
2019-12-16 7:26 ` Nicolas Boichat
2019-12-10 6:46 ` [PATCH v9 6/9] soc: mediatek: Add extra sram control Weiyi Lu
2019-12-16 7:28 ` Nicolas Boichat
2019-12-10 6:46 ` [PATCH v9 7/9] soc: mediatek: Add MT8183 scpsys support Weiyi Lu
2019-12-16 7:42 ` Nicolas Boichat
2019-12-10 6:46 ` [PATCH v9 8/9] arm64: dts: Add power controller device node of MT8183 Weiyi Lu
2019-12-10 6:46 ` [PATCH v9 9/9] arm64: dts: Add power-domains properity to mfgcfg Weiyi Lu
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