From: Stanley Chu <stanley.chu@mediatek.com>
To: <linux-scsi@vger.kernel.org>, <martin.petersen@oracle.com>,
<avri.altman@wdc.com>, <alim.akhtar@samsung.com>,
<pedrom.sousa@synopsys.com>, <jejb@linux.ibm.com>,
<matthias.bgg@gmail.com>
Cc: <linux-mediatek@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <beanhuo@micron.com>,
<kuohong.wang@mediatek.com>, <peter.wang@mediatek.com>,
<chun-hung.wu@mediatek.com>, <andy.teng@mediatek.com>,
Stanley Chu <stanley.chu@mediatek.com>
Subject: [PATCH v1 4/4] scsi: ufs-mediatek: configure and enable clk-gating
Date: Fri, 13 Dec 2019 16:11:35 +0800 [thread overview]
Message-ID: <1576224695-22657-5-git-send-email-stanley.chu@mediatek.com> (raw)
In-Reply-To: <1576224695-22657-1-git-send-email-stanley.chu@mediatek.com>
Enable clk-gating with customized delayed timer value in
MediaTek Chipsets.
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
---
drivers/scsi/ufs/ufs-mediatek.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c
index 71e2e0e4ea11..282ad06ec846 100644
--- a/drivers/scsi/ufs/ufs-mediatek.c
+++ b/drivers/scsi/ufs/ufs-mediatek.c
@@ -205,6 +205,9 @@ static int ufs_mtk_init(struct ufs_hba *hba)
/* Enable runtime autosuspend */
hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND;
+ /* Enable clock-gating */
+ hba->caps |= UFSHCD_CAP_CLK_GATING;
+
/*
* ufshcd_vops_init() is invoked after
* ufshcd_setup_clock(true) in ufshcd_hba_init() thus
@@ -293,6 +296,23 @@ static int ufs_mtk_pre_link(struct ufs_hba *hba)
return ret;
}
+static void ufs_mtk_setup_clk_gating(struct ufs_hba *hba)
+{
+ unsigned long flags;
+ u32 ah_ms;
+
+ if (ufshcd_is_clkgating_allowed(hba)) {
+ if (ufshcd_is_auto_hibern8_supported(hba) && hba->ahit)
+ ah_ms = FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK,
+ hba->ahit);
+ else
+ ah_ms = 10;
+ spin_lock_irqsave(hba->host->host_lock, flags);
+ hba->clk_gating.delay_ms = ah_ms + 5;
+ spin_unlock_irqrestore(hba->host->host_lock, flags);
+ }
+}
+
static int ufs_mtk_post_link(struct ufs_hba *hba)
{
/* disable device LCC */
@@ -308,6 +328,8 @@ static int ufs_mtk_post_link(struct ufs_hba *hba)
FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3));
}
+ ufs_mtk_setup_clk_gating(hba);
+
return 0;
}
--
2.18.0
next prev parent reply other threads:[~2019-12-13 9:11 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-13 8:11 [PATCH v1 0/4] scsi: ufs-mediatek: provide power management Stanley Chu
2019-12-13 8:11 ` [PATCH v1 1/4] scsi: ufs-mediatek: introduce reference clock control Stanley Chu
2019-12-19 18:17 ` Alim Akhtar
2019-12-13 8:11 ` [PATCH v1 2/4] scsi: ufs: export ufshcd_auto_hibern8_update for vendor usage Stanley Chu
2019-12-18 23:53 ` Asutosh Das (asd)
2019-12-19 18:32 ` Alim Akhtar
2019-12-13 8:11 ` [PATCH v1 3/4] scsi: ufs-mediatek: configure customized auto-hibern8 timer Stanley Chu
2019-12-19 18:25 ` Alim Akhtar
2019-12-13 8:11 ` Stanley Chu [this message]
2019-12-19 18:33 ` [PATCH v1 4/4] scsi: ufs-mediatek: configure and enable clk-gating Alim Akhtar
2019-12-19 23:17 ` [PATCH v1 0/4] scsi: ufs-mediatek: provide power management Martin K. Petersen
2019-12-20 1:25 ` Stanley Chu
2019-12-20 2:25 ` Martin K. Petersen
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