From: Kishon Vijay Abraham I <kishon@ti.com>
To: Rob Herring <robh+dt@kernel.org>,
Anil Varughese <aniljoy@cadence.com>,
Roger Quadros <rogerq@ti.com>, Jyri Sarha <jsarha@ti.com>
Cc: <devicetree@vger.kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v4 04/14] phy: cadence: Sierra: Add support for SERDES_16G used in J721E SoC
Date: Mon, 16 Dec 2019 15:27:02 +0530 [thread overview]
Message-ID: <20191216095712.13266-5-kishon@ti.com> (raw)
In-Reply-To: <20191216095712.13266-1-kishon@ti.com>
SERDES_16G in TI's J721E SoC uses Cadence Sierra PHY. Add
support to use Cadence Sierra driver in J721E SoC.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/cadence/phy-cadence-sierra.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c
index c60809f615af..d3b0dac2db77 100644
--- a/drivers/phy/cadence/phy-cadence-sierra.c
+++ b/drivers/phy/cadence/phy-cadence-sierra.c
@@ -553,11 +553,25 @@ static const struct cdns_sierra_data cdns_map_sierra = {
cdns_usb_regs
};
+static const struct cdns_sierra_data cdns_ti_map_sierra = {
+ SIERRA_MACRO_ID,
+ 0x0,
+ 0x1,
+ ARRAY_SIZE(cdns_pcie_regs),
+ ARRAY_SIZE(cdns_usb_regs),
+ cdns_pcie_regs,
+ cdns_usb_regs
+};
+
static const struct of_device_id cdns_sierra_id_table[] = {
{
.compatible = "cdns,sierra-phy-t0",
.data = &cdns_map_sierra,
},
+ {
+ .compatible = "ti,sierra-phy-t0",
+ .data = &cdns_ti_map_sierra,
+ },
{}
};
MODULE_DEVICE_TABLE(of, cdns_sierra_id_table);
--
2.17.1
next prev parent reply other threads:[~2019-12-16 9:56 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-16 9:56 [PATCH v4 00/14] PHY: Add support for SERDES in TI's J721E SoC Kishon Vijay Abraham I
2019-12-16 9:56 ` [PATCH v4 01/14] dt-bindings: phy: Sierra: Add bindings for Sierra in TI's J721E Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 02/14] phy: cadence: Sierra: Make "phy_clk" and "sierra_apb" optional resources Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 03/14] phy: cadence: Sierra: Use "regmap" for read and write to Sierra registers Kishon Vijay Abraham I
2019-12-16 9:57 ` Kishon Vijay Abraham I [this message]
2019-12-16 9:57 ` [PATCH v4 05/14] phy: cadence: Sierra: Make cdns_sierra_phy_init() as phy_ops Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 06/14] phy: cadence: Sierra: Modify register macro names to be in sync with Sierra user guide Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 07/14] phy: cadence: Sierra: Configure both lane cdb and common cdb registers for external SSC Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 08/14] phy: cadence: Sierra: Get reset control "array" for each link Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 09/14] phy: cadence: Sierra: Check for PLL lock during PHY power on Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 10/14] phy: cadence: Sierra: Change MAX_LANES of Sierra to 16 Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 11/14] phy: cadence: Sierra: Set cmn_refclk_dig_div/cmn_refclk1_dig_div frequency to 25MHz Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 12/14] phy: cadence: Sierra: Use correct dev pointer in cdns_sierra_phy_remove() Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 13/14] dt-bindings: phy: Document WIZ (SERDES wrapper) bindings Kishon Vijay Abraham I
2019-12-18 20:59 ` Rob Herring
2020-01-02 9:56 ` [PATCH v5 " Kishon Vijay Abraham I
2020-01-03 22:34 ` Rob Herring
2020-01-06 5:51 ` Kishon Vijay Abraham I
2020-01-13 17:59 ` Rob Herring
2020-01-14 8:06 ` Kishon Vijay Abraham I
2019-12-16 9:57 ` [PATCH v4 14/14] phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC Kishon Vijay Abraham I
2020-01-06 6:32 ` [PATCH v4 00/14] PHY: Add support for SERDES in TI's " Kishon Vijay Abraham I
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