From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Laxman Dewangan <ldewangan@nvidia.com>,
Mikko Perttunen <cyndis@kapsi.fi>,
Wolfram Sang <wsa@the-dreams.de>
Cc: linux-i2c@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v5 6/8] i2c: tegra: Use relaxed versions of readl/writel
Date: Tue, 14 Jan 2020 04:34:40 +0300 [thread overview]
Message-ID: <20200114013442.28448-7-digetx@gmail.com> (raw)
In-Reply-To: <20200114013442.28448-1-digetx@gmail.com>
There is nothing to synchronize in regards to memory accesses for PIO
transfers and for DMA transfers the DMA API takes care of the syncing.
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/i2c/busses/i2c-tegra.c | 21 +++++++++++----------
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index e0eb8f5dcd6b..1a390e1bff72 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -284,12 +284,12 @@ struct tegra_i2c_dev {
static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
unsigned long reg)
{
- writel(val, i2c_dev->base + reg);
+ writel_relaxed(val, i2c_dev->base + reg);
}
static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
{
- return readl(i2c_dev->base + reg);
+ return readl_relaxed(i2c_dev->base + reg);
}
/*
@@ -307,16 +307,16 @@ static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev,
static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
unsigned long reg)
{
- writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
+ writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
/* Read back register to make sure that register writes completed */
if (reg != I2C_TX_FIFO)
- readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
+ readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
}
static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
{
- return readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
+ return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
}
static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,
@@ -689,12 +689,13 @@ static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev)
i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD);
if (i2c_dev->is_curr_atomic_xfer)
- err = readl_poll_timeout_atomic(addr, val, val == 0,
- 1000,
- I2C_CONFIG_LOAD_TIMEOUT);
+ err = readl_relaxed_poll_timeout_atomic(
+ addr, val, val == 0, 1000,
+ I2C_CONFIG_LOAD_TIMEOUT);
else
- err = readl_poll_timeout(addr, val, val == 0, 1000,
- I2C_CONFIG_LOAD_TIMEOUT);
+ err = readl_relaxed_poll_timeout(
+ addr, val, val == 0, 1000,
+ I2C_CONFIG_LOAD_TIMEOUT);
if (err) {
dev_warn(i2c_dev->dev,
--
2.24.0
next prev parent reply other threads:[~2020-01-14 1:37 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-14 1:34 [PATCH v5 0/8] NVIDIA Tegra I2C driver fixes and improvements Dmitry Osipenko
2020-01-14 1:34 ` [PATCH v5 1/8] i2c: tegra: Fix suspending in active runtime PM state Dmitry Osipenko
2020-01-15 17:33 ` Wolfram Sang
2020-01-14 1:34 ` [PATCH v5 2/8] i2c: tegra: Properly disable runtime PM on driver's probe error Dmitry Osipenko
2020-01-15 17:34 ` Wolfram Sang
2020-01-14 1:34 ` [PATCH v5 3/8] i2c: tegra: Prevent interrupt triggering after transfer timeout Dmitry Osipenko
2020-01-14 1:34 ` [PATCH v5 4/8] i2c: tegra: Support atomic transfers Dmitry Osipenko
2020-01-14 1:34 ` [PATCH v5 5/8] i2c: tegra: Rename I2C_PIO_MODE_MAX_LEN to I2C_PIO_MODE_PREFERRED_LEN Dmitry Osipenko
2020-01-14 1:34 ` Dmitry Osipenko [this message]
2020-01-14 1:34 ` [PATCH v5 7/8] i2c: tegra: Always terminate DMA transfer Dmitry Osipenko
2020-01-14 1:34 ` [PATCH v5 8/8] i2c: tegra: Check DMA completion status in addition to left time Dmitry Osipenko
2020-01-15 17:35 ` [PATCH v5 0/8] NVIDIA Tegra I2C driver fixes and improvements Wolfram Sang
2020-01-16 16:38 ` Dmitry Osipenko
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