linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Gayatri Kammela <gayatri.kammela@intel.com>
To: platform-driver-x86@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com,
	dvhart@infradead.org, mika.westerberg@intel.com,
	peterz@infradead.org, charles.d.prestopine@intel.com,
	Gayatri Kammela <gayatri.kammela@intel.com>,
	Srinivas Pandruvada <srinivas.pandruvada@intel.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	David Box <david.e.box@intel.com>
Subject: [PATCH v1 3/7] platform/x86: intel_pmc_core: Refactor the driver by removing redundant code
Date: Fri, 24 Jan 2020 10:50:24 -0800	[thread overview]
Message-ID: <6d2e02fe67541eb5a6f38475dc963028b120a287.1579890793.git.gayatri.kammela@intel.com> (raw)
In-Reply-To: <cover.1579890793.git.gayatri.kammela@intel.com>
In-Reply-To: <cover.1579890793.git.gayatri.kammela@intel.com>

pmc_core_slps0_dbg_show() is responsible for displaying debug registers
through slp_s0_debug_status entry. The driver uses the same but
redundant code to dump these debug registers for an S0ix failure.

Hence, refactor the driver by removing redundant code and reuse the
same function that both dumps registers through slp_s0_debug_status
entry and in resume for an S0ix failure.

The changes in this patch are preparatory, so platforms that support low
power sub-states can dump the debug registers when the attempt to enter
low power states are unsuccessful.

Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David Box <david.e.box@intel.com>
Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com>
---
 drivers/platform/x86/intel_pmc_core.c | 48 +++++++++++++--------------
 1 file changed, 23 insertions(+), 25 deletions(-)

diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
index 4019f517167b..f52348edab57 100644
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel_pmc_core.c
@@ -844,30 +844,41 @@ static void pmc_core_slps0_dbg_latch(struct pmc_dev *pmcdev, bool reset)
 	mutex_unlock(&pmcdev->lock);
 }
 
-static int pmc_core_slps0_dbg_show(struct seq_file *s, void *unused)
+static void pmc_core_slps0_display(struct pmc_dev *pmcdev, struct device *dev,
+				   struct seq_file *s)
 {
-	struct pmc_dev *pmcdev = s->private;
 	const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps;
 	const struct pmc_bit_map *map;
-	int offset;
+	int offset = pmcdev->map->slps0_dbg_offset;
 	u32 data;
 
-	pmc_core_slps0_dbg_latch(pmcdev, false);
-	offset = pmcdev->map->slps0_dbg_offset;
 	while (*maps) {
 		map = *maps;
 		data = pmc_core_reg_read(pmcdev, offset);
 		offset += 4;
 		while (map->name) {
-			seq_printf(s, "SLP_S0_DBG: %-32s\tState: %s\n",
-				   map->name,
-				   data & map->bit_mask ?
-				   "Yes" : "No");
+			if (dev)
+				dev_dbg(dev, "SLP_S0_DBG: %-32s\tState: %s\n",
+					map->name,
+					data & map->bit_mask ? "Yes" : "No");
+			if (s)
+				seq_printf(s, "SLP_S0_DBG: %-32s\tState: %s\n",
+					   map->name,
+					   data & map->bit_mask ? "Yes" : "No");
 			++map;
 		}
 		++maps;
 	}
+}
+
+static int pmc_core_slps0_dbg_show(struct seq_file *s, void *unused)
+{
+	struct pmc_dev *pmcdev = s->private;
+
+	pmc_core_slps0_dbg_latch(pmcdev, false);
+	pmc_core_slps0_display(pmcdev, NULL, s);
 	pmc_core_slps0_dbg_latch(pmcdev, true);
+
 	return 0;
 }
 DEFINE_SHOW_ATTRIBUTE(pmc_core_slps0_dbg);
@@ -1262,10 +1273,6 @@ static inline bool pmc_core_is_s0ix_failed(struct pmc_dev *pmcdev)
 static int pmc_core_resume(struct device *dev)
 {
 	struct pmc_dev *pmcdev = dev_get_drvdata(dev);
-	const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps;
-	int offset = pmcdev->map->slps0_dbg_offset;
-	const struct pmc_bit_map *map;
-	u32 data;
 
 	if (!pmcdev->check_counters)
 		return 0;
@@ -1283,18 +1290,9 @@ static int pmc_core_resume(struct device *dev)
 	/* The real interesting case - S0ix failed - lets ask PMC why. */
 	dev_warn(dev, "CPU did not enter SLP_S0!!! (S0ix cnt=%llu)\n",
 		 pmcdev->s0ix_counter);
-	while (*maps) {
-		map = *maps;
-		data = pmc_core_reg_read(pmcdev, offset);
-		offset += 4;
-		while (map->name) {
-			dev_dbg(dev, "SLP_S0_DBG: %-32s\tState: %s\n",
-				map->name,
-				data & map->bit_mask ? "Yes" : "No");
-			map++;
-		}
-		maps++;
-	}
+	if (pmcdev->map->slps0_dbg_maps)
+		pmc_core_slps0_display(pmcdev, dev, NULL);
+
 	return 0;
 }
 
-- 
2.17.1


  parent reply	other threads:[~2020-01-24 18:53 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-24 18:50 [PATCH v1 0/7] platform/x86: intel_pmc_core: Add debugfs entries Gayatri Kammela
2020-01-24 18:50 ` [PATCH v1 1/7] platform/x86: intel_pmc_core: Add debugfs entry to access sub-state residencies Gayatri Kammela
2020-01-24 18:50 ` [PATCH v1 2/7] platform/x86: intel_pmc_core: Add debugfs entry for low power mode status registers Gayatri Kammela
2020-01-24 18:50 ` Gayatri Kammela [this message]
2020-01-24 18:50 ` [PATCH v1 4/7] platform/x86: intel_pmc_core: Remove slp_s0 attributes from tgl_reg_map Gayatri Kammela
2020-01-24 18:50 ` [PATCH v1 5/7] platform/x86: intel_pmc_core: Add an additional parameter to pmc_core_lpm_display() Gayatri Kammela
2020-01-24 18:50 ` [PATCH v1 6/7] platform/x86: intel_pmc_core: Dump low power status registers on an S0ix.y failure Gayatri Kammela
2020-01-24 18:50 ` [PATCH v1 7/7] platform/x86: intel_pmc_core: Add debugfs support to access live status registers Gayatri Kammela
2020-01-27 10:49 ` [PATCH v1 0/7] platform/x86: intel_pmc_core: Add debugfs entries Andy Shevchenko
2020-01-27 18:02   ` Kammela, Gayatri
2020-01-27 18:59     ` Andy Shevchenko
2020-02-04  4:00       ` Kammela, Gayatri
2020-02-04 11:34         ` Andy Shevchenko
2020-02-04 23:10           ` Kammela, Gayatri
2020-02-05  9:08             ` Andy Shevchenko

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6d2e02fe67541eb5a6f38475dc963028b120a287.1579890793.git.gayatri.kammela@intel.com \
    --to=gayatri.kammela@intel.com \
    --cc=andriy.shevchenko@linux.intel.com \
    --cc=charles.d.prestopine@intel.com \
    --cc=david.e.box@intel.com \
    --cc=dvhart@infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mika.westerberg@intel.com \
    --cc=peterz@infradead.org \
    --cc=platform-driver-x86@vger.kernel.org \
    --cc=srinivas.pandruvada@intel.com \
    --cc=vishwanath.somayaji@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).