From: Jernej Skrabec <jernej.skrabec@siol.net>
To: mripard@kernel.org, wens@csie.org
Cc: mchehab@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
mturquette@baylibre.com, sboyd@kernel.org,
hverkuil-cisco@xs4all.nl, linux-media@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-sunxi@googlegroups.com
Subject: [PATCH 3/8] ARM: dts: sunxi: Fix DE2 clocks register range
Date: Sat, 25 Jan 2020 00:20:09 +0100 [thread overview]
Message-ID: <20200124232014.574989-4-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20200124232014.574989-1-jernej.skrabec@siol.net>
As it can be seen from DE2 manual, clock range is 0x10000.
Fix it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +-
arch/arm/boot/dts/sun8i-r40.dtsi | 2 +-
arch/arm/boot/dts/sun8i-v3s.dtsi | 2 +-
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 74ac7ee9383c..053d439b01a7 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -314,7 +314,7 @@ soc {
display_clocks: clock@1000000 {
compatible = "allwinner,sun8i-a83t-de2-clk";
- reg = <0x01000000 0x100000>;
+ reg = <0x01000000 0x10000>;
clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_PLL_DE>;
clock-names = "bus",
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 8f09a24b36ec..a9d037667a83 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -119,7 +119,7 @@ soc {
display_clocks: clock@1000000 {
compatible = "allwinner,sun8i-r40-de2-clk",
"allwinner,sun8i-h3-de2-clk";
- reg = <0x01000000 0x100000>;
+ reg = <0x01000000 0x10000>;
clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_DE>;
clock-names = "bus",
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 81ea50838cd5..e5312869c0d2 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -105,7 +105,7 @@ soc {
display_clocks: clock@1000000 {
compatible = "allwinner,sun8i-v3s-de2-clk";
- reg = <0x01000000 0x100000>;
+ reg = <0x01000000 0x10000>;
clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_DE>;
clock-names = "bus",
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 5e9c3060aa08..799f32bafd80 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -114,7 +114,7 @@ soc {
display_clocks: clock@1000000 {
/* compatible is in per SoC .dtsi file */
- reg = <0x01000000 0x100000>;
+ reg = <0x01000000 0x10000>;
clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_DE>;
clock-names = "bus",
--
2.25.0
next prev parent reply other threads:[~2020-01-24 23:20 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-24 23:20 [PATCH 0/8] media: sunxi: Add DE2 rotate driver Jernej Skrabec
2020-01-24 23:20 ` [PATCH 1/8] clk: sunxi-ng: sun8i-de2: Swap A64 and H6 definitions Jernej Skrabec
2020-01-25 3:05 ` [linux-sunxi] " Chen-Yu Tsai
2020-01-25 11:20 ` Jernej Škrabec
2020-01-25 11:24 ` Jernej Škrabec
2020-01-24 23:20 ` [PATCH 2/8] clk: sunxi-ng: sun8i-de2: Fix A83T clocks and reset Jernej Skrabec
2020-01-24 23:20 ` Jernej Skrabec [this message]
2020-01-24 23:20 ` [PATCH 4/8] arm64: dts: allwinner: a64: Fix display clock register range Jernej Skrabec
2020-01-24 23:20 ` [PATCH 5/8] media: dt-bindings: media: Add Allwinner A83T Rotate driver Jernej Skrabec
2020-02-03 15:48 ` Rob Herring
2020-01-24 23:20 ` [PATCH 6/8] media: sun8i: " Jernej Skrabec
2020-01-24 23:20 ` [PATCH 7/8] ARM: dts: sun8i: a83t: Add device node for rotation core Jernej Skrabec
2020-01-24 23:20 ` [PATCH 8/8] arm64: dts: allwinner: a64: add " Jernej Skrabec
2020-02-11 19:12 ` [linux-sunxi] [PATCH 0/8] media: sunxi: Add DE2 rotate driver Jernej Škrabec
2020-03-12 5:31 ` Chen-Yu Tsai
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