From: kan.liang@linux.intel.com
To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org
Cc: ak@linux.intel.com, Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH 1/3] perf/x86/intel: Add Elkhart Lake support
Date: Tue, 28 Jan 2020 10:31:17 -0800 [thread overview]
Message-ID: <1580236279-35492-1-git-send-email-kan.liang@linux.intel.com> (raw)
From: Kan Liang <kan.liang@linux.intel.com>
Elkhart Lake also uses Tremont CPU. From the perspective of Intel PMU,
there is nothing changed compared with Jacobsville.
Share the perf code with Jacobsville.
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
arch/x86/events/intel/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index f43ec24..b5b04164 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4746,6 +4746,7 @@ __init int intel_pmu_init(void)
break;
case INTEL_FAM6_ATOM_TREMONT_D:
+ case INTEL_FAM6_ATOM_TREMONT:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
--
2.7.4
next reply other threads:[~2020-01-28 18:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-28 18:31 kan.liang [this message]
2020-01-28 18:31 ` [PATCH 2/3] perf/x86/cstate: Add Tremont support kan.liang
2020-02-11 12:47 ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-01-28 18:31 ` [PATCH 3/3] perf/x86/msr: " kan.liang
2020-02-11 12:47 ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-02-11 12:47 ` [tip: perf/core] perf/x86/intel: Add Elkhart Lake support tip-bot2 for Kan Liang
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