From: kan.liang@linux.intel.com
To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org
Cc: ak@linux.intel.com, Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH 3/3] perf/x86/msr: Add Tremont support
Date: Tue, 28 Jan 2020 10:31:19 -0800 [thread overview]
Message-ID: <1580236279-35492-3-git-send-email-kan.liang@linux.intel.com> (raw)
In-Reply-To: <1580236279-35492-1-git-send-email-kan.liang@linux.intel.com>
From: Kan Liang <kan.liang@linux.intel.com>
Tremont is Intel's successor to Goldmont Plus. SMI_COUNT MSR is also
supported.
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
arch/x86/events/msr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 6f86650..a949f6f 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -75,8 +75,9 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_ATOM_GOLDMONT:
case INTEL_FAM6_ATOM_GOLDMONT_D:
-
case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
+ case INTEL_FAM6_ATOM_TREMONT_D:
+ case INTEL_FAM6_ATOM_TREMONT:
case INTEL_FAM6_XEON_PHI_KNL:
case INTEL_FAM6_XEON_PHI_KNM:
--
2.7.4
next prev parent reply other threads:[~2020-01-28 18:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-28 18:31 [PATCH 1/3] perf/x86/intel: Add Elkhart Lake support kan.liang
2020-01-28 18:31 ` [PATCH 2/3] perf/x86/cstate: Add Tremont support kan.liang
2020-02-11 12:47 ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-01-28 18:31 ` kan.liang [this message]
2020-02-11 12:47 ` [tip: perf/core] perf/x86/msr: " tip-bot2 for Kan Liang
2020-02-11 12:47 ` [tip: perf/core] perf/x86/intel: Add Elkhart Lake support tip-bot2 for Kan Liang
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