[RESEND,v5,11/11] arm64: dts: mt2712: use non-empty ranges for usb-phy
diff mbox series

Message ID 0b039294697126edb25a699b8c25b7fcc84eed36.1581389234.git.chunfeng.yun@mediatek.com
State In Next
Commit d66fa35481022ca3c3a8d7bc906d382b7eebc9b7
Headers show
Series
  • [RESEND,v5,01/11] dt-bindings: phy-mtk-tphy: add two optional properties for u2phy
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Commit Message

Chunfeng Yun Feb. 11, 2020, 3:21 a.m. UTC
Use non-empty ranges for usb-phy to make the layout of
its registers clearer;
Replace deprecated compatible by generic

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
v3~v5: no changes

v2: use generic compatible
---
 arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 42 ++++++++++++-----------
 1 file changed, 22 insertions(+), 20 deletions(-)

Comments

Matthias Brugger May 16, 2020, 3:35 p.m. UTC | #1
On 11/02/2020 04:21, Chunfeng Yun wrote:
> Use non-empty ranges for usb-phy to make the layout of
> its registers clearer;
> Replace deprecated compatible by generic
> 
> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>

queued for v5.7-next/dts64

Thanks a lot

> ---
> v3~v5: no changes
> 
> v2: use generic compatible
> ---
>  arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 42 ++++++++++++-----------
>  1 file changed, 22 insertions(+), 20 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> index 43307bad3f0d..e24f2f2f6004 100644
> --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> @@ -697,30 +697,31 @@ usb_host0: xhci@11270000 {
>  	};
>  
>  	u3phy0: usb-phy@11290000 {
> -		compatible = "mediatek,mt2712-u3phy";
> -		#address-cells = <2>;
> -		#size-cells = <2>;
> -		ranges;
> +		compatible = "mediatek,mt2712-tphy",
> +			     "mediatek,generic-tphy-v2";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0 0 0x11290000 0x9000>;
>  		status = "okay";
>  
> -		u2port0: usb-phy@11290000 {
> -			reg = <0 0x11290000 0 0x700>;
> +		u2port0: usb-phy@0 {
> +			reg = <0x0 0x700>;
>  			clocks = <&clk26m>;
>  			clock-names = "ref";
>  			#phy-cells = <1>;
>  			status = "okay";
>  		};
>  
> -		u2port1: usb-phy@11298000 {
> -			reg = <0 0x11298000 0 0x700>;
> +		u2port1: usb-phy@8000 {
> +			reg = <0x8000 0x700>;
>  			clocks = <&clk26m>;
>  			clock-names = "ref";
>  			#phy-cells = <1>;
>  			status = "okay";
>  		};
>  
> -		u3port0: usb-phy@11298700 {
> -			reg = <0 0x11298700 0 0x900>;
> +		u3port0: usb-phy@8700 {
> +			reg = <0x8700 0x900>;
>  			clocks = <&clk26m>;
>  			clock-names = "ref";
>  			#phy-cells = <1>;
> @@ -760,30 +761,31 @@ usb_host1: xhci@112c0000 {
>  	};
>  
>  	u3phy1: usb-phy@112e0000 {
> -		compatible = "mediatek,mt2712-u3phy";
> -		#address-cells = <2>;
> -		#size-cells = <2>;
> -		ranges;
> +		compatible = "mediatek,mt2712-tphy",
> +			     "mediatek,generic-tphy-v2";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0 0 0x112e0000 0x9000>;
>  		status = "okay";
>  
> -		u2port2: usb-phy@112e0000 {
> -			reg = <0 0x112e0000 0 0x700>;
> +		u2port2: usb-phy@0 {
> +			reg = <0x0 0x700>;
>  			clocks = <&clk26m>;
>  			clock-names = "ref";
>  			#phy-cells = <1>;
>  			status = "okay";
>  		};
>  
> -		u2port3: usb-phy@112e8000 {
> -			reg = <0 0x112e8000 0 0x700>;
> +		u2port3: usb-phy@8000 {
> +			reg = <0x8000 0x700>;
>  			clocks = <&clk26m>;
>  			clock-names = "ref";
>  			#phy-cells = <1>;
>  			status = "okay";
>  		};
>  
> -		u3port1: usb-phy@112e8700 {
> -			reg = <0 0x112e8700 0 0x900>;
> +		u3port1: usb-phy@8700 {
> +			reg = <0x8700 0x900>;
>  			clocks = <&clk26m>;
>  			clock-names = "ref";
>  			#phy-cells = <1>;
>

Patch
diff mbox series

diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 43307bad3f0d..e24f2f2f6004 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -697,30 +697,31 @@  usb_host0: xhci@11270000 {
 	};
 
 	u3phy0: usb-phy@11290000 {
-		compatible = "mediatek,mt2712-u3phy";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
+		compatible = "mediatek,mt2712-tphy",
+			     "mediatek,generic-tphy-v2";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0x11290000 0x9000>;
 		status = "okay";
 
-		u2port0: usb-phy@11290000 {
-			reg = <0 0x11290000 0 0x700>;
+		u2port0: usb-phy@0 {
+			reg = <0x0 0x700>;
 			clocks = <&clk26m>;
 			clock-names = "ref";
 			#phy-cells = <1>;
 			status = "okay";
 		};
 
-		u2port1: usb-phy@11298000 {
-			reg = <0 0x11298000 0 0x700>;
+		u2port1: usb-phy@8000 {
+			reg = <0x8000 0x700>;
 			clocks = <&clk26m>;
 			clock-names = "ref";
 			#phy-cells = <1>;
 			status = "okay";
 		};
 
-		u3port0: usb-phy@11298700 {
-			reg = <0 0x11298700 0 0x900>;
+		u3port0: usb-phy@8700 {
+			reg = <0x8700 0x900>;
 			clocks = <&clk26m>;
 			clock-names = "ref";
 			#phy-cells = <1>;
@@ -760,30 +761,31 @@  usb_host1: xhci@112c0000 {
 	};
 
 	u3phy1: usb-phy@112e0000 {
-		compatible = "mediatek,mt2712-u3phy";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
+		compatible = "mediatek,mt2712-tphy",
+			     "mediatek,generic-tphy-v2";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0x112e0000 0x9000>;
 		status = "okay";
 
-		u2port2: usb-phy@112e0000 {
-			reg = <0 0x112e0000 0 0x700>;
+		u2port2: usb-phy@0 {
+			reg = <0x0 0x700>;
 			clocks = <&clk26m>;
 			clock-names = "ref";
 			#phy-cells = <1>;
 			status = "okay";
 		};
 
-		u2port3: usb-phy@112e8000 {
-			reg = <0 0x112e8000 0 0x700>;
+		u2port3: usb-phy@8000 {
+			reg = <0x8000 0x700>;
 			clocks = <&clk26m>;
 			clock-names = "ref";
 			#phy-cells = <1>;
 			status = "okay";
 		};
 
-		u3port1: usb-phy@112e8700 {
-			reg = <0 0x112e8700 0 0x900>;
+		u3port1: usb-phy@8700 {
+			reg = <0x8700 0x900>;
 			clocks = <&clk26m>;
 			clock-names = "ref";
 			#phy-cells = <1>;