From: peng.fan@nxp.com
To: shawnguo@kernel.org, s.hauer@pengutronix.de,
leonard.crestez@nxp.com, sboyd@kernel.org, abel.vesa@nxp.com
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Anson.Huang@nxp.com,
daniel.baluta@nxp.com, aford173@gmail.com, ping.bai@nxp.com,
jun.li@nxp.com, l.stach@pengutronix.de, andrew.smirnov@gmail.com,
agx@sigxcpu.org, angus@akkea.ca, heiko@sntech.de,
fugang.duan@nxp.com, linux-clk@vger.kernel.org,
Peng Fan <peng.fan@nxp.com>,
devicetree@vger.kernel.org
Subject: [PATCH 01/10] arm64: dts: imx8m: assign clocks for A53
Date: Thu, 12 Mar 2020 17:01:23 +0800 [thread overview]
Message-ID: <1584003692-25523-2-git-send-email-peng.fan@nxp.com> (raw)
In-Reply-To: <1584003692-25523-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and
assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what
is done in drivers/clk/imx/clk-imx8m*.c, then we could remove
the settings in driver which triggers lockdep warning.
Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: devicetree@vger.kernel.org
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 10 +++++++---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 10 +++++++---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 ++++++++---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++--
4 files changed, 29 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 2e5e7c4457db..8d2200224db4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -471,16 +471,20 @@
<&clk_ext3>, <&clk_ext4>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4";
- assigned-clocks = <&clk IMX8MM_CLK_NOC>,
+ assigned-clocks = <&clk IMX8MM_CLK_A53_SRC>,
+ <&clk IMX8MM_CLK_A53_CORE>,
+ <&clk IMX8MM_CLK_NOC>,
<&clk IMX8MM_CLK_AUDIO_AHB>,
<&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
<&clk IMX8MM_SYS_PLL3>,
<&clk IMX8MM_VIDEO_PLL1>,
<&clk IMX8MM_AUDIO_PLL1>,
<&clk IMX8MM_AUDIO_PLL2>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>,
+ <&clk IMX8MM_ARM_PLL_OUT>,
+ <&clk IMX8MM_SYS_PLL3_OUT>,
<&clk IMX8MM_SYS_PLL1_800M>;
- assigned-clock-rates = <0>,
+ assigned-clock-rates = <0>, <0>, <0>,
<400000000>,
<400000000>,
<750000000>,
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index ff9c1ea38130..ad88ba3bf28c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -380,13 +380,17 @@
<&clk_ext3>, <&clk_ext4>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4";
- assigned-clocks = <&clk IMX8MN_CLK_NOC>,
+ assigned-clocks = <&clk IMX8MN_CLK_A53_SRC>,
+ <&clk IMX8MN_CLK_A53_CORE>,
+ <&clk IMX8MN_CLK_NOC>,
<&clk IMX8MN_CLK_AUDIO_AHB>,
<&clk IMX8MN_CLK_IPG_AUDIO_ROOT>,
<&clk IMX8MN_SYS_PLL3>;
- assigned-clock-parents = <&clk IMX8MN_SYS_PLL3_OUT>,
+ assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_800M>,
+ <&clk IMX8MN_ARM_PLL_OUT>,
+ <&clk IMX8MN_SYS_PLL3_OUT>,
<&clk IMX8MN_SYS_PLL1_800M>;
- assigned-clock-rates = <0>,
+ assigned-clock-rates = <0>, <0>, <0>,
<400000000>,
<400000000>,
<600000000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index d92199bf6635..3a96082e8717 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -284,7 +284,9 @@
<&clk_ext3>, <&clk_ext4>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4";
- assigned-clocks = <&clk IMX8MP_CLK_NOC>,
+ assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>,
+ <&clk IMX8MP_CLK_A53_CORE>,
+ <&clk IMX8MP_CLK_NOC>,
<&clk IMX8MP_CLK_NOC_IO>,
<&clk IMX8MP_CLK_GIC>,
<&clk IMX8MP_CLK_AUDIO_AHB>,
@@ -292,12 +294,15 @@
<&clk IMX8MP_CLK_IPG_AUDIO_ROOT>,
<&clk IMX8MP_AUDIO_PLL1>,
<&clk IMX8MP_AUDIO_PLL2>;
- assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
+ <&clk IMX8MP_ARM_PLL_OUT>,
+ <&clk IMX8MP_SYS_PLL2_1000M>,
<&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_SYS_PLL2_500M>,
<&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_SYS_PLL1_800M>;
- assigned-clock-rates = <1000000000>,
+ assigned-clock-rates = <0>, <0>,
+ <1000000000>,
<800000000>,
<500000000>,
<400000000>,
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 9bbdaf2d6e34..1f3ffc8c8a78 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -594,8 +594,13 @@
clock-names = "ckil", "osc_25m", "osc_27m",
"clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4";
- assigned-clocks = <&clk IMX8MQ_CLK_NOC>;
- assigned-clock-rates = <800000000>;
+ assigned-clocks = <&clk IMX8MQ_CLK_A53_SRC>,
+ <&clk IMX8MQ_CLK_A53_CORE>,
+ <&clk IMX8MQ_CLK_NOC>;
+ assigned-clock-rates = <0>, <0>,
+ <800000000>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>,
+ <&clk IMX8MQ_ARM_PLL_OUT>;
};
src: reset-controller@30390000 {
--
2.16.4
next prev parent reply other threads:[~2020-03-12 9:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-12 9:01 [PATCH 00/10] clk: imx: fixes and improve for i.MX8M peng.fan
2020-03-12 9:01 ` peng.fan [this message]
2020-03-12 9:01 ` [PATCH 02/10] clk: imx8m: drop clk_hw_set_parent for A53 peng.fan
2020-03-12 9:01 ` [PATCH 03/10] clk: imx: imx8mp: fix pll mux bit peng.fan
2020-03-12 9:01 ` [PATCH 04/10] clk: imx8mp: Define gates for pll1/2 fixed dividers peng.fan
2020-03-12 9:01 ` [PATCH 05/10] clk: imx8mp: use imx8m_clk_hw_composite_core to simplify code peng.fan
2020-03-12 9:01 ` [PATCH 06/10] clk: imx8m: migrate A53 clk root to use composite core peng.fan
2020-03-12 9:01 ` [PATCH 07/10] clk: imx: add mux ops for i.MX8M composite clk peng.fan
2020-03-12 9:01 ` [PATCH 08/10] clk: imx: add imx8m_clk_hw_composite_bus peng.fan
2020-03-12 9:01 ` [PATCH 09/10] clk: imx: use imx8m_clk_hw_composite_bus for i.MX8M bus clk slice peng.fan
2020-03-12 9:01 ` [PATCH 10/10] clk: imx8mp: mark memrepair clock as critical peng.fan
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