From: Lyude Paul <lyude@redhat.com>
To: nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: "Ben Skeggs" <bskeggs@redhat.com>,
"David Airlie" <airlied@linux.ie>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Sean Paul" <seanpaul@chromium.org>,
"Pankaj Bharadiya" <pankaj.laxminarayan.bharadiya@intel.com>,
"Takashi Iwai" <tiwai@suse.de>,
"Ilia Mirkin" <imirkin@alum.mit.edu>,
"Christian König" <christian.koenig@amd.com>,
"Sam Ravnborg" <sam@ravnborg.org>,
"Gerd Hoffmann" <kraxel@redhat.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH 8/9] drm/nouveau/kms/nv50-: Move hard-coded object handles into header
Date: Tue, 17 Mar 2020 20:41:05 -0400 [thread overview]
Message-ID: <20200318004159.235623-9-lyude@redhat.com> (raw)
In-Reply-To: <20200318004159.235623-1-lyude@redhat.com>
While most of the functionality on Nvidia GPUs doesn't require using an
explicit handle instead of the main VRAM handle + offset, there are a
couple of places that do require explicit handles, such as CRC
functionality. Since this means we're about to add another
nouveau-chosen handle, let's just go ahead and move any hard-coded
handles into a single header. This is just to keep things slightly
organized, and to make it a little bit easier if we need to add more
handles in the future.
This patch should contain no functional changes.
Signed-off-by: Lyude Paul <lyude@redhat.com>
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 7 +++++--
drivers/gpu/drm/nouveau/dispnv50/handles.h | 15 +++++++++++++++
drivers/gpu/drm/nouveau/dispnv50/wndw.c | 3 ++-
3 files changed, 22 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/nouveau/dispnv50/handles.h
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index ef01f2473947..bfea85782d0e 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -26,6 +26,7 @@
#include "core.h"
#include "head.h"
#include "wndw.h"
+#include "handles.h"
#include <linux/dma-mapping.h>
#include <linux/hdmi.h>
@@ -153,7 +154,8 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
if (!syncbuf)
return 0;
- ret = nvif_object_init(&dmac->base.user, 0xf0000000, NV_DMA_IN_MEMORY,
+ ret = nvif_object_init(&dmac->base.user, NV50_DISP_HANDLE_SYNCBUF,
+ NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
.access = NV_DMA_V0_ACCESS_RDWR,
@@ -164,7 +166,8 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
if (ret)
return ret;
- ret = nvif_object_init(&dmac->base.user, 0xf0000001, NV_DMA_IN_MEMORY,
+ ret = nvif_object_init(&dmac->base.user, NV50_DISP_HANDLE_VRAM,
+ NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
.access = NV_DMA_V0_ACCESS_RDWR,
diff --git a/drivers/gpu/drm/nouveau/dispnv50/handles.h b/drivers/gpu/drm/nouveau/dispnv50/handles.h
new file mode 100644
index 000000000000..e3a62c7a0d08
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/dispnv50/handles.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+#ifndef __NV50_KMS_HANDLES_H__
+#define __NV50_KMS_HANDLES_H__
+
+/*
+ * Various hard-coded object handles that nouveau uses. These are made-up by
+ * nouveau developers, not Nvidia. The only significance of the handles chosen
+ * is that they must all be unique.
+ */
+#define NV50_DISP_HANDLE_SYNCBUF 0xf0000000
+#define NV50_DISP_HANDLE_VRAM 0xf0000001
+
+#define NV50_DISP_HANDLE_WNDW_CTX(kind) (0xfb000000 | kind)
+
+#endif /* !__NV50_KMS_HANDLES_H__ */
diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndw.c b/drivers/gpu/drm/nouveau/dispnv50/wndw.c
index 39cca8eaa066..cb67a715bd69 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/wndw.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/wndw.c
@@ -21,6 +21,7 @@
*/
#include "wndw.h"
#include "wimm.h"
+#include "handles.h"
#include <nvif/class.h>
#include <nvif/cl0002.h>
@@ -44,7 +45,7 @@ nv50_wndw_ctxdma_new(struct nv50_wndw *wndw, struct nouveau_framebuffer *fb)
struct nouveau_drm *drm = nouveau_drm(fb->base.dev);
struct nv50_wndw_ctxdma *ctxdma;
const u8 kind = fb->nvbo->kind;
- const u32 handle = 0xfb000000 | kind;
+ const u32 handle = NV50_DISP_HANDLE_WNDW_CTX(kind);
struct {
struct nv_dma_v0 base;
union {
--
2.24.1
next prev parent reply other threads:[~2020-03-18 0:43 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-18 0:40 [PATCH 0/9] drm/nouveau: Introduce CRC support for gf119+ Lyude Paul
2020-03-18 0:40 ` [PATCH 1/9] drm/vblank: Add vblank works Lyude Paul
2020-03-18 13:46 ` Daniel Vetter
2020-03-19 20:12 ` Lyude Paul
2020-03-27 20:29 ` Lyude Paul
2020-03-27 20:38 ` Lyude Paul
2020-04-13 20:18 ` Lyude Paul
2020-04-13 20:42 ` Tejun Heo
2020-04-13 21:07 ` Sam Ravnborg
2020-04-14 16:52 ` Lyude Paul
2020-04-14 18:17 ` Tejun Heo
2020-05-07 18:57 ` Lyude Paul
2020-03-18 0:40 ` [PATCH 2/9] drm/nouveau/kms/nv50-: Unroll error cleanup in nv50_head_create() Lyude Paul
2020-03-18 0:41 ` [PATCH 3/9] drm/nouveau/kms/nv140-: Don't modify depth in state during atomic commit Lyude Paul
2020-03-18 0:41 ` [PATCH 4/9] drm/nouveau/kms/nv50-: Fix disabling dithering Lyude Paul
2020-03-18 0:41 ` [PATCH 5/9] drm/nouveau/kms/nv50-: s/harm/armh/g Lyude Paul
2020-03-18 0:41 ` [PATCH 6/9] drm/nouveau/kms/nv140-: Track wndw mappings in nv50_head_atom Lyude Paul
2020-03-18 0:41 ` [PATCH 7/9] drm/nouveau/kms/nv50-: Expose nv50_outp_atom in disp.h Lyude Paul
2020-03-18 0:41 ` Lyude Paul [this message]
2020-03-18 0:41 ` [PATCH 9/9] drm/nouveau/kms/nvd9-: Add CRC support Lyude Paul
2020-03-18 1:09 ` [PATCH v2] " Lyude Paul
2020-03-18 6:02 ` [PATCH 9/9] " Greg Kroah-Hartman
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