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From: Ansuel Smith <ansuelsmth@gmail.com>
To: Andy Gross <agross@kernel.org>
Cc: Abhishek Sahu <absahu@codeaurora.org>,
	Ansuel Smith <ansuelsmth@gmail.com>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Kumar Gala <galak@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2] ipq806x: gcc: Added the enable regs and mask for PRNG
Date: Wed, 18 Mar 2020 14:16:56 +0100	[thread overview]
Message-ID: <20200318131657.345-1-ansuelsmth@gmail.com> (raw)

From: Abhishek Sahu <absahu@codeaurora.org>

Kernel got hanged while reading from /dev/hwrng at the
time of PRNG clock enable

Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global
clock controller (GCC)"

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
v2:
 * Fix wrong authorship

 drivers/clk/qcom/gcc-ipq806x.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index b0eee0903807..a8456e09c44d 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -1224,6 +1224,8 @@ static struct clk_rcg prng_src = {
 		.parent_map = gcc_pxo_pll8_map,
 	},
 	.clkr = {
+		.enable_reg = 0x2e80,
+		.enable_mask = BIT(11),
 		.hw.init = &(struct clk_init_data){
 			.name = "prng_src",
 			.parent_names = gcc_pxo_pll8,
-- 
2.25.0


             reply	other threads:[~2020-03-18 13:17 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-18 13:16 Ansuel Smith [this message]
2020-03-20 23:28 ` [PATCH v2] ipq806x: gcc: Added the enable regs and mask for PRNG Stephen Boyd
2020-03-20 23:29 ` Stephen Boyd

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