From: Abel Vesa <abel.vesa@nxp.com>
To: Rob Herring <robh@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>,
Fabio Estevam <fabio.estevam@nxp.com>,
Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Lee Jones <lee.jones@linaro.org>,
Anson Huang <anson.huang@nxp.com>,
Leonard Crestez <leonard.crestez@nxp.com>,
Peng Fan <peng.fan@nxp.com>, Jacky Bai <ping.bai@nxp.com>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-clk@vger.kernel.org, Abel Vesa <abel.vesa@nxp.com>
Subject: [PATCH v2 05/13] clk: imx: gate2: Allow single bit gating clock
Date: Wed, 25 Mar 2020 17:38:43 +0200 [thread overview]
Message-ID: <1585150731-3354-6-git-send-email-abel.vesa@nxp.com> (raw)
In-Reply-To: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com>
Audiomix on i.MX8MP registers two gates that share the same enable count
but use the same bit to control the gate instead of two bits. By adding
the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic
gate ops for enable, disable and is_enabled.
For the disable_unused, nothing happens if this flag is specified.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
drivers/clk/imx/clk-gate2.c | 31 +++++++++++++++++++++++--------
drivers/clk/imx/clk.h | 13 +++++++++++++
2 files changed, 36 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index ce0060e..b87ab3c 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -41,21 +41,26 @@ static int clk_gate2_enable(struct clk_hw *hw)
struct clk_gate2 *gate = to_clk_gate2(hw);
u32 reg;
unsigned long flags;
+ int ret = 0;
spin_lock_irqsave(gate->lock, flags);
if (gate->share_count && (*gate->share_count)++ > 0)
goto out;
- reg = readl(gate->reg);
- reg &= ~(3 << gate->bit_idx);
- reg |= gate->cgr_val << gate->bit_idx;
- writel(reg, gate->reg);
+ if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
+ ret = clk_gate_ops.enable(hw);
+ } else {
+ reg = readl(gate->reg);
+ reg &= ~(3 << gate->bit_idx);
+ reg |= gate->cgr_val << gate->bit_idx;
+ writel(reg, gate->reg);
+ }
out:
spin_unlock_irqrestore(gate->lock, flags);
- return 0;
+ return ret;
}
static void clk_gate2_disable(struct clk_hw *hw)
@@ -73,9 +78,13 @@ static void clk_gate2_disable(struct clk_hw *hw)
goto out;
}
- reg = readl(gate->reg);
- reg &= ~(3 << gate->bit_idx);
- writel(reg, gate->reg);
+ if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
+ clk_gate_ops.disable(hw);
+ } else {
+ reg = readl(gate->reg);
+ reg &= ~(3 << gate->bit_idx);
+ writel(reg, gate->reg);
+ }
out:
spin_unlock_irqrestore(gate->lock, flags);
@@ -95,6 +104,9 @@ static int clk_gate2_is_enabled(struct clk_hw *hw)
{
struct clk_gate2 *gate = to_clk_gate2(hw);
+ if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
+ return clk_gate_ops.is_enabled(hw);
+
return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
}
@@ -104,6 +116,9 @@ static void clk_gate2_disable_unused(struct clk_hw *hw)
unsigned long flags;
u32 reg;
+ if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
+ return;
+
spin_lock_irqsave(gate->lock, flags);
if (!gate->share_count || *gate->share_count == 0) {
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index f074dd8..01ff1db 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -5,6 +5,8 @@
#include <linux/spinlock.h>
#include <linux/clk-provider.h>
+#define IMX_CLK_GATE2_SINGLE_BIT 1
+
extern spinlock_t imx_ccm_lock;
void imx_check_clocks(struct clk *clks[], unsigned int count);
@@ -355,6 +357,17 @@ static inline struct clk_hw *imx_clk_hw_gate2_shared2(const char *name,
&imx_ccm_lock, share_count);
}
+static inline struct clk_hw *imx_dev_clk_hw_gate_shared(struct device *dev,
+ const char *name, const char *parent,
+ void __iomem *reg, u8 shift,
+ unsigned int *share_count)
+{
+ return clk_hw_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT |
+ CLK_OPS_PARENT_ENABLE, reg, shift, 0x3,
+ IMX_CLK_GATE2_SINGLE_BIT,
+ &imx_ccm_lock, share_count);
+}
+
static inline struct clk *imx_clk_gate2_cgr(const char *name,
const char *parent, void __iomem *reg, u8 shift, u8 cgr_val)
{
--
2.7.4
next prev parent reply other threads:[~2020-03-25 15:40 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-25 15:38 [PATCH v2 00/13] Add generic MFD i.MX mix and audiomix support Abel Vesa
2020-03-25 15:38 ` [PATCH v2 01/13] mfd: Add i.MX generic mix support Abel Vesa
2020-03-25 15:38 ` [PATCH v2 02/13] Documentation: mfd: Add DT bindings for i.MX Audiomix Abel Vesa
2020-03-31 21:54 ` Rob Herring
2020-03-25 15:38 ` [PATCH v2 03/13] arm64: dts: imx8mp: Add AIPS 4 and 5 Abel Vesa
2020-03-25 15:38 ` [PATCH v2 04/13] arm64: dts: imx8mp: Add audiomix node Abel Vesa
2020-03-25 15:38 ` Abel Vesa [this message]
2020-03-25 15:38 ` [PATCH v2 06/13] clk: imx: pll14xx: Add the device as argument when registering Abel Vesa
2020-03-25 15:38 ` [PATCH v2 07/13] clk: imx: Add helpers for passing the device as argument Abel Vesa
2020-03-25 15:38 ` [PATCH v2 08/13] dt-bindings: clocks: imx8mp: Add ids for audiomix clocks Abel Vesa
2020-03-25 15:38 ` [PATCH v2 09/13] clk: imx: Add audiomix clock controller support Abel Vesa
2020-03-25 15:38 ` [PATCH v2 10/13] arm64: dts: imx8mp: Add audiomix clock controller node Abel Vesa
2020-03-25 15:38 ` [PATCH v2 11/13] dt-bindings: reset: imx8mp: Add ids for audiomix reset Abel Vesa
2020-03-31 21:55 ` Rob Herring
2020-03-25 15:38 ` [PATCH v2 12/13] reset: imx: Add audiomix reset controller support Abel Vesa
2020-03-26 10:50 ` Philipp Zabel
2020-04-13 13:31 ` Abel Vesa
2020-03-25 15:38 ` [PATCH v2 13/13] arm64: dts: imx8mp: Add audiomix reset controller node Abel Vesa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1585150731-3354-6-git-send-email-abel.vesa@nxp.com \
--to=abel.vesa@nxp.com \
--cc=anson.huang@nxp.com \
--cc=devicetree@vger.kernel.org \
--cc=fabio.estevam@nxp.com \
--cc=kernel@pengutronix.de \
--cc=lee.jones@linaro.org \
--cc=leonard.crestez@nxp.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=peng.fan@nxp.com \
--cc=ping.bai@nxp.com \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).