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From: Chunyan Zhang <zhang.lyra@gmail.com>
To: Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Orson Zhai <orsonzhai@gmail.com>,
	Baolin Wang <baolin.wang7@gmail.com>,
	Chunyan Zhang <zhang.lyra@gmail.com>,
	Chunyan Zhang <chunyan.zhang@unisoc.com>
Subject: [PATCH 1/4] clk: sprd: check its parent status before reading gate clock
Date: Mon, 30 Mar 2020 15:31:07 +0800	[thread overview]
Message-ID: <20200330073107.14180-1-zhang.lyra@gmail.com> (raw)
In-Reply-To: <20200330071451.7899-2-zhang.lyra@gmail.com>

From: Chunyan Zhang <chunyan.zhang@unisoc.com>

Some clocks only can be accessed if their parent is enabled. mipi_csi_xx
clocks on SC9863A are examples. We have to ensure the parent clock is
enabled when reading those clocks.

Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
---
 drivers/clk/sprd/gate.c | 7 +++++++
 drivers/clk/sprd/gate.h | 9 +++++++++
 2 files changed, 16 insertions(+)

diff --git a/drivers/clk/sprd/gate.c b/drivers/clk/sprd/gate.c
index 574cfc116bbc..56e1714b541e 100644
--- a/drivers/clk/sprd/gate.c
+++ b/drivers/clk/sprd/gate.c
@@ -94,8 +94,15 @@ static int sprd_gate_is_enabled(struct clk_hw *hw)
 {
 	struct sprd_gate *sg = hw_to_sprd_gate(hw);
 	struct sprd_clk_common *common = &sg->common;
+	struct clk_hw *parent;
 	unsigned int reg;
 
+	if (sg->flags & SPRD_GATE_NON_AON) {
+		parent = clk_hw_get_parent(hw);
+		if (!parent || !clk_hw_is_enabled(parent))
+			return 0;
+	}
+
 	regmap_read(common->regmap, common->reg, &reg);
 
 	if (sg->flags & CLK_GATE_SET_TO_DISABLE)
diff --git a/drivers/clk/sprd/gate.h b/drivers/clk/sprd/gate.h
index b55817869367..aa4d72381788 100644
--- a/drivers/clk/sprd/gate.h
+++ b/drivers/clk/sprd/gate.h
@@ -19,6 +19,15 @@ struct sprd_gate {
 	struct sprd_clk_common	common;
 };
 
+/*
+ * sprd_gate->flags is used for:
+ * CLK_GATE_SET_TO_DISABLE	BIT(0)
+ * CLK_GATE_HIWORD_MASK		BIT(1)
+ * CLK_GATE_BIG_ENDIAN		BIT(2)
+ * so we define new flags from	BIT(3)
+ */
+#define SPRD_GATE_NON_AON BIT(3) /* not alway on, need to check before read */
+
 #define SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg,	\
 				    _sc_offset, _enable_mask, _flags,	\
 				    _gate_flags, _udelay, _ops, _fn)	\
-- 
2.20.1


  reply	other threads:[~2020-03-30  7:31 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-30  7:14 [PATCH 0/4] add mipi_csi_xx gate clocks for SC9863A Chunyan Zhang
2020-03-30  7:14 ` [PATCH 1/4] clk: sprd: check its parent status before reading gate clock Chunyan Zhang
2020-03-30  7:31   ` Chunyan Zhang [this message]
2020-03-30  7:14 ` [PATCH 2/4] dt-bindings: clk: sprd: add mipi_csi_xx clocks for SC9863A Chunyan Zhang
2020-04-10 17:11   ` Rob Herring
2020-03-30  7:14 ` [PATCH 3/4] clk: sprd: add dt-bindings include for mipi_csi_xx clocks Chunyan Zhang
2020-04-10 17:11   ` Rob Herring
2020-03-30  7:14 ` [PATCH 4/4] clk: sprd: add mipi_csi_xx gate clocks Chunyan Zhang

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