From: Dave Jiang <dave.jiang@intel.com>
To: vkoul@kernel.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, hpa@zytor.com, bhelgaas@google.com,
gregkh@linuxfoundation.org, arnd@arndb.de
Cc: linux-kernel@vger.kernel.org, x86@kernel.org,
dmaengine@vger.kernel.org, dan.j.williams@intel.com,
ashok.raj@intel.com, fenghua.yu@intel.com,
linux-pci@vger.kernel.org, tony.luck@intel.com,
jing.lin@intel.com, sanjay.k.kumar@intel.com
Subject: [PATCH 3/6] pci: add PCI quirk cmdmem fixup for Intel DSA device
Date: Mon, 30 Mar 2020 14:27:06 -0700 [thread overview]
Message-ID: <158560362665.6059.11999047251277108233.stgit@djiang5-desk3.ch.intel.com> (raw)
In-Reply-To: <158560290392.6059.16921214463585182874.stgit@djiang5-desk3.ch.intel.com>
Since there is no standard way that defines a PCI device that receives
descriptors or commands with synchronous write operations, add quirk to set
cmdmem for the Intel accelerator device that supports it.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
drivers/pci/quirks.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 29f473ebf20f..ba0572b9b9c8 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5461,3 +5461,14 @@ static void quirk_reset_lenovo_thinkpad_p50_nvgpu(struct pci_dev *pdev)
DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, 0x13b1,
PCI_CLASS_DISPLAY_VGA, 8,
quirk_reset_lenovo_thinkpad_p50_nvgpu);
+
+/*
+ * Until the PCI Sig defines a standard capaiblity check that indicates a
+ * device has cmdmem with synchronous write capability, we'll add a quirk
+ * for device that supports it.
+ */
+static void device_cmdmem_fixup(struct pci_dev *pdev)
+{
+ pdev->cmdmem = 1;
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x0b25, device_cmdmem_fixup);
next prev parent reply other threads:[~2020-03-30 21:27 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-30 21:26 [PATCH 0/6] Add shared workqueue support for idxd driver Dave Jiang
2020-03-30 21:26 ` [PATCH 1/6] x86/asm: add iosubmit_cmds512_sync() based on enqcmds Dave Jiang
2020-03-30 21:27 ` [PATCH 2/6] device/pci: add cmdmem cap to pci_dev Dave Jiang
2020-03-31 10:04 ` Greg KH
2020-03-31 17:07 ` Dave Jiang
2020-03-31 17:24 ` Greg KH
2020-03-31 17:38 ` Dave Jiang
2020-03-31 16:03 ` Bjorn Helgaas
2020-03-31 21:44 ` Dave Jiang
2020-03-30 21:27 ` Dave Jiang [this message]
2020-03-31 15:59 ` [PATCH 3/6] pci: add PCI quirk cmdmem fixup for Intel DSA device Bjorn Helgaas
2020-03-31 18:02 ` Dave Jiang
2020-04-01 7:18 ` Christoph Hellwig
2020-04-02 2:20 ` Dan Williams
2020-04-02 7:39 ` Christoph Hellwig
2020-03-30 21:27 ` [PATCH 4/6] device: add cmdmem support for MMIO address Dave Jiang
2020-04-01 7:19 ` Christoph Hellwig
2020-03-30 21:27 ` [PATCH 5/6] dmaengine: idxd: add shared workqueue support Dave Jiang
2020-03-30 21:27 ` [PATCH 6/6] dmaengine: idxd: add ABI documentation for shared wq Dave Jiang
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