From: Krishna Manikandan <mkrishn@codeaurora.org>
To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
freedreno@lists.freedesktop.org, devicetree@vger.kernel.org
Cc: Krishna Manikandan <mkrishn@codeaurora.org>,
linux-kernel@vger.kernel.org, robdclark@gmail.com,
seanpaul@chromium.org, hoegsberg@chromium.org,
kalyan_t@codeaurora.org, nganji@codeaurora.org
Subject: [v2 3/3] arm64: dts: sc7180: add interconnect bindings for display
Date: Thu, 2 Apr 2020 12:22:50 +0530 [thread overview]
Message-ID: <1585810370-6099-3-git-send-email-mkrishn@codeaurora.org> (raw)
In-Reply-To: <1585810370-6099-1-git-send-email-mkrishn@codeaurora.org>
This change adds the interconnect bindings to the
MDSS node. This will establish Display to DDR path
for bus bandwidth voting.
Changes in v2:
- Change in commit message
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index ea1b0cd..31fed6d 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -1521,6 +1521,9 @@
interrupt-controller;
#interrupt-cells = <1>;
+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
+ interconnect-names = "mdp0-mem";
+
iommus = <&apps_smmu 0x800 0x2>;
#address-cells = <2>;
--
1.9.1
next prev parent reply other threads:[~2020-04-02 6:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-02 6:52 [v2 1/3] drm/msm/dpu: add support for clk and bw scaling for display Krishna Manikandan
2020-04-02 6:52 ` [v2 2/3] arm64: dts: sc7180: add bus clock to mdp node for sc7180 target Krishna Manikandan
2020-04-02 6:52 ` Krishna Manikandan [this message]
2020-04-15 13:59 ` [v2 1/3] drm/msm/dpu: add support for clk and bw scaling for display Georgi Djakov
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