From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: "Lu Baolu" <baolu.lu@linux.intel.com>,
iommu@lists.linux-foundation.org,
LKML <linux-kernel@vger.kernel.org>,
Joerg Roedel <joro@8bytes.org>,
David Woodhouse <dwmw2@infradead.org>,
Jean-Philippe Brucker <jean-philippe@linaro.com>,
Eric Auger <eric.auger@redhat.com>
Cc: "Yi Liu" <yi.l.liu@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
Raj Ashok <ashok.raj@intel.com>,
Alex Williamson <alex.williamson@redhat.com>,
"Christoph Hellwig" <hch@infradead.org>,
Jonathan Cameron <jic23@kernel.org>,
Jacob Pan <jacob.jun.pan@linux.intel.com>,
Liu@vger.kernel.org
Subject: [PATCH v11 10/10] iommu/vt-d: Add custom allocator for IOASID
Date: Fri, 3 Apr 2020 11:42:14 -0700 [thread overview]
Message-ID: <1585939334-21396-11-git-send-email-jacob.jun.pan@linux.intel.com> (raw)
In-Reply-To: <1585939334-21396-1-git-send-email-jacob.jun.pan@linux.intel.com>
When VT-d driver runs in the guest, PASID allocation must be
performed via virtual command interface. This patch registers a
custom IOASID allocator which takes precedence over the default
XArray based allocator. The resulting IOASID allocation will always
come from the host. This ensures that PASID namespace is system-
wide.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Liu, Yi L <yi.l.liu@intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
---
drivers/iommu/intel-iommu.c | 84 +++++++++++++++++++++++++++++++++++++++++++++
include/linux/intel-iommu.h | 2 ++
2 files changed, 86 insertions(+)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 045c5c08d71d..ff3f0386951f 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1732,6 +1732,9 @@ static void free_dmar_iommu(struct intel_iommu *iommu)
if (ecap_prs(iommu->ecap))
intel_svm_finish_prq(iommu);
}
+ if (ecap_vcs(iommu->ecap) && vccap_pasid(iommu->vccap))
+ ioasid_unregister_allocator(&iommu->pasid_allocator);
+
#endif
}
@@ -3266,6 +3269,84 @@ static int copy_translation_tables(struct intel_iommu *iommu)
return ret;
}
+#ifdef CONFIG_INTEL_IOMMU_SVM
+static ioasid_t intel_vcmd_ioasid_alloc(ioasid_t min, ioasid_t max, void *data)
+{
+ struct intel_iommu *iommu = data;
+ ioasid_t ioasid;
+
+ if (!iommu)
+ return INVALID_IOASID;
+ /*
+ * VT-d virtual command interface always uses the full 20 bit
+ * PASID range. Host can partition guest PASID range based on
+ * policies but it is out of guest's control.
+ */
+ if (min < PASID_MIN || max > intel_pasid_max_id)
+ return INVALID_IOASID;
+
+ if (vcmd_alloc_pasid(iommu, &ioasid))
+ return INVALID_IOASID;
+
+ return ioasid;
+}
+
+static void intel_vcmd_ioasid_free(ioasid_t ioasid, void *data)
+{
+ struct intel_iommu *iommu = data;
+
+ if (!iommu)
+ return;
+ /*
+ * Sanity check the ioasid owner is done at upper layer, e.g. VFIO
+ * We can only free the PASID when all the devices are unbound.
+ */
+ if (ioasid_find(NULL, ioasid, NULL)) {
+ pr_alert("Cannot free active IOASID %d\n", ioasid);
+ return;
+ }
+ vcmd_free_pasid(iommu, ioasid);
+}
+
+static void register_pasid_allocator(struct intel_iommu *iommu)
+{
+ /*
+ * If we are running in the host, no need for custom allocator
+ * in that PASIDs are allocated from the host system-wide.
+ */
+ if (!cap_caching_mode(iommu->cap))
+ return;
+
+ if (!sm_supported(iommu)) {
+ pr_warn("VT-d Scalable Mode not enabled, no PASID allocation\n");
+ return;
+ }
+
+ /*
+ * Register a custom PASID allocator if we are running in a guest,
+ * guest PASID must be obtained via virtual command interface.
+ * There can be multiple vIOMMUs in each guest but only one allocator
+ * is active. All vIOMMU allocators will eventually be calling the same
+ * host allocator.
+ */
+ if (ecap_vcs(iommu->ecap) && vccap_pasid(iommu->vccap)) {
+ pr_info("Register custom PASID allocator\n");
+ iommu->pasid_allocator.alloc = intel_vcmd_ioasid_alloc;
+ iommu->pasid_allocator.free = intel_vcmd_ioasid_free;
+ iommu->pasid_allocator.pdata = (void *)iommu;
+ if (ioasid_register_allocator(&iommu->pasid_allocator)) {
+ pr_warn("Custom PASID allocator failed, scalable mode disabled\n");
+ /*
+ * Disable scalable mode on this IOMMU if there
+ * is no custom allocator. Mixing SM capable vIOMMU
+ * and non-SM vIOMMU are not supported.
+ */
+ intel_iommu_sm = 0;
+ }
+ }
+}
+#endif
+
static int __init init_dmars(void)
{
struct dmar_drhd_unit *drhd;
@@ -3383,6 +3464,9 @@ static int __init init_dmars(void)
*/
for_each_active_iommu(iommu, drhd) {
iommu_flush_write_buffer(iommu);
+#ifdef CONFIG_INTEL_IOMMU_SVM
+ register_pasid_allocator(iommu);
+#endif
iommu_set_root_entry(iommu);
iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);
iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index f652db3198d9..e122cb30388e 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -19,6 +19,7 @@
#include <linux/iommu.h>
#include <linux/io-64-nonatomic-lo-hi.h>
#include <linux/dmar.h>
+#include <linux/ioasid.h>
#include <asm/cacheflush.h>
#include <asm/iommu.h>
@@ -588,6 +589,7 @@ struct intel_iommu {
#ifdef CONFIG_INTEL_IOMMU_SVM
struct page_req_dsc *prq;
unsigned char prq_name[16]; /* Name for PRQ interrupt */
+ struct ioasid_allocator_ops pasid_allocator; /* Custom allocator for PASIDs */
#endif
struct q_inval *qi; /* Queued invalidation info */
u32 *iommu_state; /* Store iommu states between suspend and resume.*/
--
2.7.4
next prev parent reply other threads:[~2020-04-03 18:36 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-03 18:42 [PATCH v11 00/10] Nested Shared Virtual Address (SVA) VT-d support Jacob Pan
2020-04-03 18:42 ` [PATCH v11 01/10] iommu/vt-d: Move domain helper to header Jacob Pan
2020-04-03 18:42 ` [PATCH v11 02/10] iommu/uapi: Define a mask for bind data Jacob Pan
2020-04-08 13:07 ` Joerg Roedel
2020-04-08 16:11 ` Jacob Pan
2020-04-03 18:42 ` [PATCH v11 03/10] iommu/vt-d: Use a helper function to skip agaw for SL Jacob Pan
2020-04-05 6:37 ` Auger Eric
2020-04-03 18:42 ` [PATCH v11 04/10] iommu/vt-d: Add nested translation helper function Jacob Pan
2020-04-08 13:33 ` Auger Eric
2020-04-03 18:42 ` [PATCH v11 05/10] iommu/vt-d: Add bind guest PASID support Jacob Pan
2020-04-09 7:41 ` Auger Eric
2020-04-10 19:45 ` Jacob Pan
2020-04-16 10:43 ` Auger Eric
2020-04-17 2:45 ` Tian, Kevin
2020-04-17 7:46 ` Auger Eric
2020-04-17 15:28 ` Jacob Pan
2020-04-17 23:46 ` Tian, Kevin
2020-04-27 17:28 ` Jacob Pan
2020-04-10 21:06 ` Jacob Pan
2020-04-16 10:46 ` Auger Eric
2020-04-03 18:42 ` [PATCH v11 06/10] iommu/vt-d: Support flushing more translation cache types Jacob Pan
2020-04-05 6:37 ` Auger Eric
2020-04-03 18:42 ` [PATCH v11 07/10] iommu/vt-d: Add svm/sva invalidate function Jacob Pan
2020-04-09 8:50 ` Auger Eric
2020-04-10 21:56 ` Jacob Pan
2020-04-16 10:59 ` Auger Eric
2020-04-17 16:14 ` Jacob Pan
2020-04-03 18:42 ` [PATCH v11 08/10] iommu/vt-d: Cache virtual command capability register Jacob Pan
2020-04-09 10:14 ` Auger Eric
2020-04-03 18:42 ` [PATCH v11 09/10] iommu/vt-d: Enlightened PASID allocation Jacob Pan
2020-04-03 18:42 ` Jacob Pan [this message]
2020-04-09 10:31 ` [PATCH v11 10/10] iommu/vt-d: Add custom allocator for IOASID Auger Eric
2020-04-05 8:28 ` [PATCH v11 00/10] Nested Shared Virtual Address (SVA) VT-d support Lu Baolu
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