From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <frankc@nvidia.com>, <hverkuil@xs4all.nl>,
<sakari.ailus@iki.fi>, <helen.koike@collabora.com>
Cc: <digetx@gmail.com>, <sboyd@kernel.org>,
<linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [RFC PATCH v6 1/9] arm64: tegra: Fix sor powergate clocks and reset
Date: Fri, 3 Apr 2020 18:24:59 -0700 [thread overview]
Message-ID: <1585963507-12610-2-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1585963507-12610-1-git-send-email-skomatineni@nvidia.com>
Tegra210 device tree lists csi clock and reset under SOR powergate
node.
But Tegra210 has csicil in SOR partition and csi in VENC partition.
So, this patch includes fix for sor powergate node.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 64c46ce..d0eff92 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -796,7 +796,9 @@
pd_sor: sor {
clocks = <&tegra_car TEGRA210_CLK_SOR0>,
<&tegra_car TEGRA210_CLK_SOR1>,
- <&tegra_car TEGRA210_CLK_CSI>,
+ <&tegra_car TEGRA210_CLK_CILAB>,
+ <&tegra_car TEGRA210_CLK_CILCD>,
+ <&tegra_car TEGRA210_CLK_CILE>,
<&tegra_car TEGRA210_CLK_DSIA>,
<&tegra_car TEGRA210_CLK_DSIB>,
<&tegra_car TEGRA210_CLK_DPAUX>,
@@ -804,7 +806,6 @@
<&tegra_car TEGRA210_CLK_MIPI_CAL>;
resets = <&tegra_car TEGRA210_CLK_SOR0>,
<&tegra_car TEGRA210_CLK_SOR1>,
- <&tegra_car TEGRA210_CLK_CSI>,
<&tegra_car TEGRA210_CLK_DSIA>,
<&tegra_car TEGRA210_CLK_DSIB>,
<&tegra_car TEGRA210_CLK_DPAUX>,
--
2.7.4
next prev parent reply other threads:[~2020-04-04 1:25 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-04 1:24 [RFC PATCH v6 0/9] Add Tegra driver for video capture Sowjanya Komatineni
2020-04-04 1:24 ` Sowjanya Komatineni [this message]
2020-04-04 1:25 ` [RFC PATCH v6 2/9] arm64: tegra: Add reset-cells to mc Sowjanya Komatineni
2020-04-04 1:25 ` [RFC PATCH v6 3/9] dt-bindings: clock: tegra: Add clk id for CSI TPG clock Sowjanya Komatineni
2020-04-14 18:12 ` Rob Herring
2020-04-04 1:25 ` [RFC PATCH v6 4/9] clk: tegra: Add Tegra210 CSI TPG clock gate Sowjanya Komatineni
2020-04-04 1:25 ` [RFC PATCH v6 5/9] dt-binding: tegra: Add VI and CSI bindings Sowjanya Komatineni
2020-04-14 18:14 ` Rob Herring
2020-04-04 1:25 ` [RFC PATCH v6 6/9] media: tegra: Add Tegra210 Video input driver Sowjanya Komatineni
2020-04-05 19:37 ` Dmitry Osipenko
2020-04-06 18:58 ` Sowjanya Komatineni
2020-04-05 19:45 ` Dmitry Osipenko
2020-04-05 19:57 ` Dmitry Osipenko
2020-04-05 19:51 ` Dmitry Osipenko
2020-04-05 20:35 ` Dmitry Osipenko
2020-04-06 15:35 ` Sowjanya Komatineni
2020-04-06 16:05 ` Dmitry Osipenko
2020-04-06 16:12 ` Sowjanya Komatineni
2020-04-06 16:29 ` Dmitry Osipenko
2020-04-06 16:37 ` Sowjanya Komatineni
2020-04-06 17:02 ` Sowjanya Komatineni
2020-04-06 19:53 ` Dmitry Osipenko
2020-04-06 20:05 ` Sowjanya Komatineni
2020-04-06 20:28 ` Dmitry Osipenko
2020-04-06 20:30 ` Sowjanya Komatineni
2020-04-05 20:54 ` Dmitry Osipenko
2020-04-05 21:11 ` Dmitry Osipenko
2020-04-06 15:41 ` Sowjanya Komatineni
2020-04-06 16:11 ` Dmitry Osipenko
2020-04-07 19:05 ` Sowjanya Komatineni
2020-04-06 19:48 ` Dmitry Osipenko
2020-04-06 20:00 ` Sowjanya Komatineni
2020-04-06 20:02 ` Dmitry Osipenko
2020-04-06 20:20 ` Sowjanya Komatineni
2020-04-06 20:37 ` Dmitry Osipenko
2020-04-06 20:38 ` Sowjanya Komatineni
2020-04-06 20:43 ` Sowjanya Komatineni
2020-04-06 20:54 ` Dmitry Osipenko
2020-04-06 21:18 ` Sowjanya Komatineni
2020-04-06 20:45 ` Dmitry Osipenko
2020-04-06 20:50 ` Sowjanya Komatineni
2020-04-06 20:53 ` Dmitry Osipenko
2020-04-06 20:55 ` Sowjanya Komatineni
2020-04-06 20:56 ` Dmitry Osipenko
2020-04-06 21:02 ` Sowjanya Komatineni
2020-04-06 21:11 ` Dmitry Osipenko
2020-04-06 21:15 ` Sowjanya Komatineni
2020-04-06 21:39 ` Sowjanya Komatineni
2020-04-06 22:00 ` Sowjanya Komatineni
2020-04-06 22:07 ` Sowjanya Komatineni
2020-04-06 23:18 ` Dmitry Osipenko
2020-04-06 23:48 ` Sowjanya Komatineni
2020-04-06 23:50 ` Sowjanya Komatineni
2020-04-07 21:08 ` Sowjanya Komatineni
2020-04-07 22:08 ` Dmitry Osipenko
2020-04-07 22:14 ` Dmitry Osipenko
2020-04-07 22:22 ` Sowjanya Komatineni
2020-04-07 23:12 ` Dmitry Osipenko
[not found] ` <1a31cd60-739f-0660-1c45-31487d2f2128@nvidia.com>
2020-04-07 23:38 ` Sowjanya Komatineni
2020-04-07 23:56 ` Sowjanya Komatineni
2020-04-07 23:57 ` Sowjanya Komatineni
2020-04-07 23:59 ` Sowjanya Komatineni
2020-04-08 0:00 ` Sowjanya Komatineni
2020-04-08 14:21 ` Dmitry Osipenko
2020-04-08 17:45 ` Sowjanya Komatineni
2020-04-08 18:58 ` Sowjanya Komatineni
2020-04-08 19:38 ` Sowjanya Komatineni
2020-04-09 3:38 ` Sowjanya Komatineni
2020-04-09 14:50 ` Dmitry Osipenko
2020-04-09 18:28 ` Sowjanya Komatineni
2020-04-10 18:47 ` Dmitry Osipenko
2020-04-10 18:59 ` Sowjanya Komatineni
2020-04-10 19:45 ` Dmitry Osipenko
2020-04-07 19:39 ` Dmitry Osipenko
2020-04-07 19:42 ` Sowjanya Komatineni
2020-04-10 19:47 ` Dmitry Osipenko
2020-04-04 1:25 ` [RFC PATCH v6 7/9] MAINTAINERS: Add Tegra Video driver section Sowjanya Komatineni
2020-04-04 1:25 ` [RFC PATCH v6 8/9] dt-bindings: reset: Add ID for Tegra210 VI reset Sowjanya Komatineni
2020-04-14 18:14 ` Rob Herring
2020-04-04 1:25 ` [RFC PATCH v6 9/9] arm64: tegra: Add Tegra VI CSI support in device tree Sowjanya Komatineni
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