From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, tglx@linutronix.de, bp@alien8.de,
luto@kernel.org
Cc: hpa@zytor.com, dave.hansen@intel.com, tony.luck@intel.com,
ak@linux.intel.com, ravi.v.shankar@intel.com,
chang.seok.bae@intel.com, Sasha Levin <sashal@kernel.org>
Subject: [PATCH v12 16/18] x86/fsgsbase/64: Enable FSGSBASE on 64bit by default and add a chicken bit
Date: Mon, 11 May 2020 00:53:09 -0400 [thread overview]
Message-ID: <20200511045311.4785-17-sashal@kernel.org> (raw)
In-Reply-To: <20200511045311.4785-1-sashal@kernel.org>
From: Andy Lutomirski <luto@kernel.org>
Now that FSGSBASE is fully supported, remove unsafe_fsgsbase, enable
FSGSBASE by default, and add nofsgsbase to disable it.
While this changes userspace visible ABI, we could not find a project
that would be affected by this. Few projects were contacted for input
and ack:
- 5-level EPT: http://lkml.kernel.org/r/9ddf602b-6c8b-8c1e-ab46-07ed12366593@redhat.com
- rr: https://mail.mozilla.org/pipermail/rr-dev/2018-March/000616.html
- CRIU: https://lists.openvz.org/pipermail/criu/2018-March/040654.html
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
---
.../admin-guide/kernel-parameters.txt | 3 +-
arch/x86/kernel/cpu/common.c | 32 ++++++++-----------
2 files changed, 15 insertions(+), 20 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index af3aaade195b8..1924845c879c2 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3033,8 +3033,7 @@
no5lvl [X86-64] Disable 5-level paging mode. Forces
kernel to use 4-level paging instead.
- unsafe_fsgsbase [X86] Allow FSGSBASE instructions. This will be
- replaced with a nofsgsbase flag.
+ nofsgsbase [X86] Disables FSGSBASE instructions.
no_console_suspend
[HW] Never suspend the console
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 4224760c74e27..0d480cbadc7dc 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -418,21 +418,21 @@ static void __init setup_cr_pinning(void)
static_key_enable(&cr_pinning.key);
}
-/*
- * Temporary hack: FSGSBASE is unsafe until a few kernel code paths are
- * updated. This allows us to get the kernel ready incrementally.
- *
- * Once all the pieces are in place, these will go away and be replaced with
- * a nofsgsbase chicken flag.
- */
-static bool unsafe_fsgsbase;
-
-static __init int setup_unsafe_fsgsbase(char *arg)
+static __init int x86_nofsgsbase_setup(char *arg)
{
- unsafe_fsgsbase = true;
+ /* Require an exact match without trailing characters. */
+ if (strlen(arg))
+ return 0;
+
+ /* Do not emit a message if the feature is not present. */
+ if (!boot_cpu_has(X86_FEATURE_FSGSBASE))
+ return 1;
+
+ setup_clear_cpu_cap(X86_FEATURE_FSGSBASE);
+ pr_info("FSGSBASE disabled via kernel command line\n");
return 1;
}
-__setup("unsafe_fsgsbase", setup_unsafe_fsgsbase);
+__setup("nofsgsbase", x86_nofsgsbase_setup);
/*
* Protection Keys are not available in 32-bit mode.
@@ -1495,12 +1495,8 @@ static void identify_cpu(struct cpuinfo_x86 *c)
setup_umip(c);
/* Enable FSGSBASE instructions if available. */
- if (cpu_has(c, X86_FEATURE_FSGSBASE)) {
- if (unsafe_fsgsbase)
- cr4_set_bits(X86_CR4_FSGSBASE);
- else
- clear_cpu_cap(c, X86_FEATURE_FSGSBASE);
- }
+ if (cpu_has(c, X86_FEATURE_FSGSBASE))
+ cr4_set_bits(X86_CR4_FSGSBASE);
/*
* The vendor-specific functions might have changed features.
--
2.20.1
next prev parent reply other threads:[~2020-05-11 4:54 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-11 4:52 [PATCH v12 00/18] Enable FSGSBASE instructions Sasha Levin
2020-05-11 4:52 ` [PATCH v12 01/18] x86/ptrace: Prevent ptrace from clearing the FS/GS selector Sasha Levin
2020-05-11 4:52 ` [PATCH v12 02/18] selftests/x86/fsgsbase: Test GS selector on ptracer-induced GS base write Sasha Levin
2020-05-11 4:52 ` [PATCH v12 03/18] x86/cpu: Add 'unsafe_fsgsbase' to enable CR4.FSGSBASE Sasha Levin
2020-05-11 4:52 ` [PATCH v12 04/18] x86/entry/64: Clean up paranoid exit Sasha Levin
2020-05-11 4:52 ` [PATCH v12 05/18] x86/entry/64: Switch CR3 before SWAPGS in paranoid entry Sasha Levin
2020-05-11 4:52 ` [PATCH v12 06/18] x86/entry/64: Introduce the FIND_PERCPU_BASE macro Sasha Levin
2020-05-11 4:53 ` [PATCH v12 07/18] x86/entry/64: Handle FSGSBASE enabled paranoid entry/exit Sasha Levin
2020-05-11 4:53 ` [PATCH v12 08/18] x86/entry/64: Document GSBASE handling in the paranoid path Sasha Levin
2020-05-11 4:53 ` [PATCH v12 09/18] x86/fsgsbase/64: Add intrinsics for FSGSBASE instructions Sasha Levin
2020-05-11 4:53 ` [PATCH v12 10/18] x86/fsgsbase/64: Enable FSGSBASE instructions in helper functions Sasha Levin
2020-05-18 18:20 ` Thomas Gleixner
2020-05-18 20:24 ` Sasha Levin
2020-05-18 22:59 ` Thomas Gleixner
2020-05-19 12:20 ` David Laight
2020-05-19 14:48 ` Thomas Gleixner
2020-05-20 9:13 ` David Laight
2020-05-11 4:53 ` [PATCH v12 11/18] x86/fsgsbase/64: Use FSGSBASE in switch_to() if available Sasha Levin
2020-05-11 4:53 ` [PATCH v12 12/18] x86/fsgsbase/64: move save_fsgs to header file Sasha Levin
2020-05-11 4:53 ` [PATCH v12 13/18] x86/fsgsbase/64: Use FSGSBASE instructions on thread copy and ptrace Sasha Levin
2020-05-11 4:53 ` [PATCH v12 14/18] x86/speculation/swapgs: Check FSGSBASE in enabling SWAPGS mitigation Sasha Levin
2020-05-11 4:53 ` [PATCH v12 15/18] selftests/x86/fsgsbase: Test ptracer-induced GS base write with FSGSBASE Sasha Levin
2020-05-11 4:53 ` Sasha Levin [this message]
2020-05-11 4:53 ` [PATCH v12 17/18] x86/elf: Enumerate kernel FSGSBASE capability in AT_HWCAP2 Sasha Levin
2020-05-11 4:53 ` [PATCH v12 18/18] Documentation/x86/64: Add documentation for GS/FS addressing mode Sasha Levin
2020-05-15 9:24 ` [PATCH v12 00/18] Enable FSGSBASE instructions Jarkko Sakkinen
2020-05-15 16:40 ` Sasha Levin
2020-05-15 17:55 ` Andi Kleen
2020-05-15 23:07 ` Sasha Levin
2020-05-16 12:21 ` Jarkko Sakkinen
2020-05-16 9:50 ` Jarkko Sakkinen
2020-05-18 15:34 ` Andi Kleen
2020-05-18 20:01 ` Jarkko Sakkinen
2020-05-18 23:03 ` Thomas Gleixner
2020-05-19 16:48 ` Jarkko Sakkinen
2020-05-22 20:14 ` Don Porter
2020-05-22 20:55 ` Dave Hansen
2020-05-23 0:45 ` Thomas Gleixner
2020-05-24 19:45 ` hpa
2020-05-24 21:19 ` Sasha Levin
2020-05-24 23:44 ` hpa
2020-05-25 7:54 ` Richard Weinberger
2020-05-25 21:56 ` Tony Luck
2020-05-26 8:12 ` David Laight
2020-05-26 8:23 ` Richard Weinberger
2020-05-27 8:31 ` Jarkko Sakkinen
2020-05-26 12:42 ` Don Porter
2020-05-26 20:27 ` Sasha Levin
2020-05-26 22:03 ` Don Porter
2020-05-26 22:51 ` Sasha Levin
2020-05-28 17:37 ` Don Porter
2020-05-28 10:29 ` Thomas Gleixner
2020-05-28 17:40 ` Don Porter
2020-05-28 18:38 ` Andy Lutomirski
2020-05-29 15:27 ` Wojtek Porczyk
2020-06-25 15:27 ` Don Porter
2020-06-25 21:37 ` Jarkko Sakkinen
2020-07-18 18:19 ` Don Porter
2020-07-23 3:23 ` Jarkko Sakkinen
2020-05-28 19:19 ` Jarkko Sakkinen
2020-05-28 19:41 ` Sasha Levin
2020-05-29 3:07 ` Jarkko Sakkinen
2020-05-29 3:10 ` Jarkko Sakkinen
2020-06-25 15:30 ` Don Porter
2020-06-25 21:40 ` Jarkko Sakkinen
2020-05-23 4:19 ` Andi Kleen
2020-05-28 10:36 ` Thomas Gleixner
2020-05-27 8:20 ` Jarkko Sakkinen
2020-05-27 12:42 ` Wojtek Porczyk
2020-05-18 9:51 ` Thomas Gleixner
2020-05-18 15:16 ` Sasha Levin
2020-05-18 18:28 ` Thomas Gleixner
2020-05-18 19:36 ` Jarkko Sakkinen
2020-05-18 6:18 ` Christoph Hellwig
2020-05-18 12:33 ` Sasha Levin
2020-05-18 14:53 ` Thomas Gleixner
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