From: peng.fan@nxp.com
To: shawnguo@kernel.org, fabio.estevam@nxp.com,
kernel@pengutronix.de, aisheng.dong@nxp.com, robh+dt@kernel.org,
sboyd@kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-imx@nxp.com,
leonard.crestez@nxp.com, daniel.baluta@nxp.com,
l.stach@pengutronix.de, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, Peng Fan <peng.fan@nxp.com>
Subject: [PATCH 1/3] arm64: dts: imx8m: add mu node
Date: Wed, 20 May 2020 10:04:36 +0800 [thread overview]
Message-ID: <1589940278-3680-2-git-send-email-peng.fan@nxp.com> (raw)
In-Reply-To: <1589940278-3680-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add mu node to let A53 could communicate with M Core.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++++
3 files changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index f3bbefe3e59f..9722f76d8c3f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -771,6 +771,15 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index fb63a98fdff5..5f30f1d50460 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -671,6 +671,15 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 1d15680a4962..e969fcbbd15f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -956,6 +956,15 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mq-usdhc",
"fsl,imx7d-usdhc";
--
2.16.4
next prev parent reply other threads:[~2020-05-20 2:14 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-20 2:04 [PATCH 0/3] imx8m: add mu support peng.fan
2020-05-20 2:04 ` peng.fan [this message]
2020-05-20 6:45 ` [PATCH 1/3] arm64: dts: imx8m: add mu node Aisheng Dong
2020-05-20 2:04 ` [PATCH 2/3] clk: imx8mp: add mu root clk peng.fan
2020-05-20 6:46 ` Aisheng Dong
2020-05-20 2:04 ` [PATCH 3/3] arm64: dts: imx8mp: add mu node peng.fan
2020-05-20 2:59 ` Fabio Estevam
2020-05-20 3:01 ` Peng Fan
2020-05-20 3:06 ` Fabio Estevam
2020-05-20 3:06 ` Peng Fan
2020-05-20 6:50 ` Aisheng Dong
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