From: Sarthak Garg <sartgarg@codeaurora.org>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org
Cc: vbadigan@codeaurora.org, stummala@codeaurora.org,
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
Sarthak Garg <sartgarg@codeaurora.org>
Subject: [PATCH V2 7/8] mmc: sdhci-msm: Introduce new ops to dump vendor specific registers
Date: Fri, 22 May 2020 15:02:29 +0530 [thread overview]
Message-ID: <1590139950-7288-8-git-send-email-sartgarg@codeaurora.org> (raw)
In-Reply-To: <1590139950-7288-1-git-send-email-sartgarg@codeaurora.org>
Introduce new sdhci ops to dump vendor specific registers in the
sdhci_dumpregs during error.
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
---
drivers/mmc/host/sdhci.c | 3 +++
drivers/mmc/host/sdhci.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 90cdefc..37b1158c 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -111,6 +111,9 @@ void sdhci_dumpregs(struct sdhci_host *host)
}
}
+ if (host->ops->dump_vendor_regs)
+ host->ops->dump_vendor_regs(host);
+
SDHCI_DUMP("============================================\n");
}
EXPORT_SYMBOL_GPL(sdhci_dumpregs);
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index d628ab6..0008bbd 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -650,6 +650,7 @@ struct sdhci_ops {
unsigned int length);
void (*request_done)(struct sdhci_host *host,
struct mmc_request *mrq);
+ void (*dump_vendor_regs)(struct sdhci_host *host);
};
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
--
2.7.4
next prev parent reply other threads:[~2020-05-22 9:38 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-07 8:02 [PATCH V1 0/7] Target specific DLL configuration for qcom SDHC Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 1/7] dt-bindings: mmc: Add information for DLL register properties Sarthak Garg
2020-05-15 2:50 ` Rob Herring
2020-05-19 14:00 ` sartgarg
2020-05-20 11:33 ` Ulf Hansson
2020-05-07 8:02 ` [PATCH V1 2/7] mmc: host: sdhci-msm: Configure dll-user-control in dll init sequence Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 3/7] mmc: sdhci-msm: Update dll_config_3 as per HSR Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 4/7] mmc: sdhci-msm: Update DDR_CONFIG as per device tree file Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 5/7] mmc: sdhci-msm: Read and use DLL Config property from " Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 6/7] mmc: sdhci-msm: Introduce new ops to dump vendor specific registers Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 7/7] mmc: sdhci-msm: dump vendor specific registers during error Sarthak Garg
2020-05-15 14:32 ` [PATCH V1 0/7] Target specific DLL configuration for qcom SDHC Adrian Hunter
2020-05-22 9:23 ` [PATCH V2 0/8] Board " Sarthak Garg
2020-05-22 9:32 ` Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 1/8] dt-bindings: mmc: Add new compatible string for sm8250 target Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 2/8] dt-bindings: mmc: Add information for DLL register properties Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 3/8] mmc: host: sdhci-msm: Configure dll-user-control in dll init sequence Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 4/8] mmc: sdhci-msm: Update dll_config_3 as per HSR Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 5/8] mmc: sdhci-msm: Update DDR_CONFIG as per device tree file Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 6/8] mmc: sdhci-msm: Read and use DLL Config property from " Sarthak Garg
2020-05-22 9:32 ` Sarthak Garg [this message]
2020-05-22 9:32 ` [PATCH V2 8/8] mmc: sdhci-msm: dump vendor specific registers during error Sarthak Garg
2020-05-25 8:47 ` [PATCH V2 0/8] Board specific DLL configuration for qcom SDHC Ulf Hansson
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