From: Sarthak Garg <sartgarg@codeaurora.org>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org
Cc: vbadigan@codeaurora.org, stummala@codeaurora.org,
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
Sarthak Garg <sartgarg@codeaurora.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>
Subject: [PATCH V2 8/8] mmc: sdhci-msm: dump vendor specific registers during error
Date: Fri, 22 May 2020 15:02:30 +0530 [thread overview]
Message-ID: <1590139950-7288-9-git-send-email-sartgarg@codeaurora.org> (raw)
In-Reply-To: <1590139950-7288-1-git-send-email-sartgarg@codeaurora.org>
Implement dump_vendor_registers host operation to print the
vendor specific registers in addition to standard SDHC
register during error conditions.
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
---
drivers/mmc/host/sdhci-msm.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 61cf0f1..95cd973 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -1874,6 +1874,36 @@ static void sdhci_msm_reset(struct sdhci_host *host, u8 mask)
sdhci_reset(host, mask);
}
+#define DRIVER_NAME "sdhci_msm"
+#define SDHCI_MSM_DUMP(f, x...) \
+ pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
+
+void sdhci_msm_dump_vendor_regs(struct sdhci_host *host)
+{
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
+ const struct sdhci_msm_offset *msm_offset = msm_host->offset;
+
+ SDHCI_MSM_DUMP("----------- VENDOR REGISTER DUMP -----------\n");
+
+ SDHCI_MSM_DUMP(
+ "DLL sts: 0x%08x | DLL cfg: 0x%08x | DLL cfg2: 0x%08x\n",
+ readl_relaxed(host->ioaddr + msm_offset->core_dll_status),
+ readl_relaxed(host->ioaddr + msm_offset->core_dll_config),
+ readl_relaxed(host->ioaddr + msm_offset->core_dll_config_2));
+ SDHCI_MSM_DUMP(
+ "DLL cfg3: 0x%08x | DLL usr ctl: 0x%08x | DDR cfg: 0x%08x\n",
+ readl_relaxed(host->ioaddr + msm_offset->core_dll_config_3),
+ readl_relaxed(host->ioaddr + msm_offset->core_dll_usr_ctl),
+ readl_relaxed(host->ioaddr + msm_offset->core_ddr_config));
+ SDHCI_MSM_DUMP(
+ "Vndr func: 0x%08x | Vndr func2 : 0x%08x Vndr func3: 0x%08x\n",
+ readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec),
+ readl_relaxed(host->ioaddr +
+ msm_offset->core_vendor_spec_func2),
+ readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3));
+}
+
static const struct sdhci_msm_variant_ops mci_var_ops = {
.msm_readl_relaxed = sdhci_msm_mci_variant_readl_relaxed,
.msm_writel_relaxed = sdhci_msm_mci_variant_writel_relaxed,
@@ -1929,6 +1959,7 @@ static const struct sdhci_ops sdhci_msm_ops = {
.write_w = sdhci_msm_writew,
.write_b = sdhci_msm_writeb,
.irq = sdhci_msm_cqe_irq,
+ .dump_vendor_regs = sdhci_msm_dump_vendor_regs,
};
static const struct sdhci_pltfm_data sdhci_msm_pdata = {
--
2.7.4
next prev parent reply other threads:[~2020-05-22 9:38 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-07 8:02 [PATCH V1 0/7] Target specific DLL configuration for qcom SDHC Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 1/7] dt-bindings: mmc: Add information for DLL register properties Sarthak Garg
2020-05-15 2:50 ` Rob Herring
2020-05-19 14:00 ` sartgarg
2020-05-20 11:33 ` Ulf Hansson
2020-05-07 8:02 ` [PATCH V1 2/7] mmc: host: sdhci-msm: Configure dll-user-control in dll init sequence Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 3/7] mmc: sdhci-msm: Update dll_config_3 as per HSR Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 4/7] mmc: sdhci-msm: Update DDR_CONFIG as per device tree file Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 5/7] mmc: sdhci-msm: Read and use DLL Config property from " Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 6/7] mmc: sdhci-msm: Introduce new ops to dump vendor specific registers Sarthak Garg
2020-05-07 8:02 ` [PATCH V1 7/7] mmc: sdhci-msm: dump vendor specific registers during error Sarthak Garg
2020-05-15 14:32 ` [PATCH V1 0/7] Target specific DLL configuration for qcom SDHC Adrian Hunter
2020-05-22 9:23 ` [PATCH V2 0/8] Board " Sarthak Garg
2020-05-22 9:32 ` Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 1/8] dt-bindings: mmc: Add new compatible string for sm8250 target Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 2/8] dt-bindings: mmc: Add information for DLL register properties Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 3/8] mmc: host: sdhci-msm: Configure dll-user-control in dll init sequence Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 4/8] mmc: sdhci-msm: Update dll_config_3 as per HSR Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 5/8] mmc: sdhci-msm: Update DDR_CONFIG as per device tree file Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 6/8] mmc: sdhci-msm: Read and use DLL Config property from " Sarthak Garg
2020-05-22 9:32 ` [PATCH V2 7/8] mmc: sdhci-msm: Introduce new ops to dump vendor specific registers Sarthak Garg
2020-05-22 9:32 ` Sarthak Garg [this message]
2020-05-25 8:47 ` [PATCH V2 0/8] Board specific DLL configuration for qcom SDHC Ulf Hansson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1590139950-7288-9-git-send-email-sartgarg@codeaurora.org \
--to=sartgarg@codeaurora.org \
--cc=adrian.hunter@intel.com \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=stummala@codeaurora.org \
--cc=ulf.hansson@linaro.org \
--cc=vbadigan@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).