From: Alexandre Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>, Zong Li <zong.li@sifive.com>,
Anup Patel <anup@brainfault.org>, Christoph Hellwig <hch@lst.de>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Alexandre Ghiti <alex@ghiti.fr>,
Palmer Dabbelt <palmerdabbelt@google.com>
Subject: [PATCH 2/8] riscv: Allow to dynamically define VA_BITS
Date: Sun, 24 May 2020 05:10:02 -0400 [thread overview]
Message-ID: <20200524091008.25587-3-alex@ghiti.fr> (raw)
In-Reply-To: <20200524091008.25587-1-alex@ghiti.fr>
With 4-level page table folding at runtime, we don't know at compile time
the size of the virtual address space so we must set VA_BITS dynamically
so that sparsemem reserves the right amount of memory for struct pages.
Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
arch/riscv/Kconfig | 10 ----------
arch/riscv/include/asm/pgtable.h | 12 ++++++++++--
arch/riscv/include/asm/sparsemem.h | 2 +-
3 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 93127d5913fe..64b25a90d60f 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -101,16 +101,6 @@ config ZONE_DMA32
bool
default y if 64BIT
-config VA_BITS
- int
- default 32 if 32BIT
- default 39 if 64BIT
-
-config PA_BITS
- int
- default 34 if 32BIT
- default 56 if 64BIT
-
config PAGE_OFFSET
hex
default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 25213cfaf680..8e96315b3366 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -41,7 +41,7 @@
* position vmemmap directly below the VMALLOC region.
*/
#define VMEMMAP_SHIFT \
- (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
+ (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
#define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT)
#define VMEMMAP_END (VMALLOC_START - 1)
#define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE)
@@ -80,6 +80,14 @@
#endif /* CONFIG_64BIT */
#ifdef CONFIG_MMU
+#ifdef CONFIG_64BIT
+#define VA_BITS 39
+#define PA_BITS 56
+#else
+#define VA_BITS 32
+#define PA_BITS 34
+#endif
+
/* Number of entries in the page global directory */
#define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
/* Number of entries in the page table */
@@ -466,7 +474,7 @@ static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
* and give the kernel the other (upper) half.
*/
#ifdef CONFIG_64BIT
-#define KERN_VIRT_START (-(BIT(CONFIG_VA_BITS)) + TASK_SIZE)
+#define KERN_VIRT_START (-(BIT(VA_BITS)) + TASK_SIZE)
#else
#define KERN_VIRT_START FIXADDR_START
#endif
diff --git a/arch/riscv/include/asm/sparsemem.h b/arch/riscv/include/asm/sparsemem.h
index 45a7018a8118..f08d72155bc8 100644
--- a/arch/riscv/include/asm/sparsemem.h
+++ b/arch/riscv/include/asm/sparsemem.h
@@ -4,7 +4,7 @@
#define _ASM_RISCV_SPARSEMEM_H
#ifdef CONFIG_SPARSEMEM
-#define MAX_PHYSMEM_BITS CONFIG_PA_BITS
+#define MAX_PHYSMEM_BITS PA_BITS
#define SECTION_SIZE_BITS 27
#endif /* CONFIG_SPARSEMEM */
--
2.20.1
next prev parent reply other threads:[~2020-05-24 9:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-24 9:10 [PATCH 0/8] Introduce sv48 support Alexandre Ghiti
2020-05-24 9:10 ` [PATCH 1/8] riscv: Get rid of compile time logic with MAX_EARLY_MAPPING_SIZE Alexandre Ghiti
2020-05-24 9:10 ` Alexandre Ghiti [this message]
2020-05-24 9:10 ` [PATCH 3/8] riscv: Simplify MAXPHYSMEM config Alexandre Ghiti
2020-05-24 9:10 ` [PATCH 4/8] riscv: Prepare ptdump for vm layout dynamic addresses Alexandre Ghiti
2020-05-25 5:54 ` Anup Patel
2020-05-24 9:10 ` [PATCH 5/8] riscv: Implement sv48 support Alexandre Ghiti
2020-05-25 6:10 ` Anup Patel
2020-05-25 6:45 ` Anup Patel
2020-05-26 16:30 ` Alex Ghiti
2020-05-28 13:35 ` Anup Patel
2020-05-24 9:10 ` [PATCH 6/8] riscv: Allow user to downgrade to sv39 when hw supports sv48 Alexandre Ghiti
2020-05-25 6:12 ` Anup Patel
2020-05-24 9:10 ` [PATCH 7/8] riscv: Use pgtable_l4_enabled to output mmu type in cpuinfo Alexandre Ghiti
2020-05-25 6:21 ` Anup Patel
2020-05-26 16:26 ` Alex Ghiti
2020-05-24 9:10 ` [PATCH 8/8] riscv: Explicit comment about user virtual address space size Alexandre Ghiti
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