From: Greentime Hu <greentime.hu@sifive.com>
To: greentime.hu@sifive.com, guoren@linux.alibaba.com,
vincent.chen@sifive.com, paul.walmsley@sifive.com,
palmerdabbelt@google.com, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, oleg@redhat.com
Subject: [RFC PATCH v5 02/13] riscv: Separate patch for cflags and aflags
Date: Thu, 28 May 2020 14:40:50 +0800 [thread overview]
Message-ID: <c4e9f2ffc5b60c208e7c35d250dbc0f0cfde8bac.1590646208.git.greentime.hu@sifive.com> (raw)
In-Reply-To: <cover.1590646208.git.greentime.hu@sifive.com>
From: Guo Ren <guoren@linux.alibaba.com>
From: Guo Ren <ren_guo@c-sky.com>
Use "subst fd" in Makefile is a hack way and it's not convenient
to add new ISA feature. Just separate them into riscv-march-cflags
and riscv-march-aflags.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
---
arch/riscv/Makefile | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index fb6e37db836d..957d064bead0 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -37,12 +37,18 @@ else
endif
# ISA string setting
-riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
-riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
-riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
-riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
-KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
-KBUILD_AFLAGS += -march=$(riscv-march-y)
+riscv-march-cflags-$(CONFIG_ARCH_RV32I) := rv32ima
+riscv-march-cflags-$(CONFIG_ARCH_RV64I) := rv64ima
+riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
+riscv-march-cflags-$(CONFIG_RISCV_ISA_C) := $(riscv-march-cflags-y)c
+
+riscv-march-aflags-$(CONFIG_ARCH_RV32I) := rv32ima
+riscv-march-aflags-$(CONFIG_ARCH_RV64I) := rv64ima
+riscv-march-aflags-$(CONFIG_FPU) := $(riscv-march-aflags-y)fd
+riscv-march-aflags-$(CONFIG_RISCV_ISA_C) := $(riscv-march-aflags-y)c
+
+KBUILD_CFLAGS += -march=$(riscv-march-cflags-y)
+KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)
KBUILD_CFLAGS += -mno-save-restore
KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
--
2.26.2
next prev parent reply other threads:[~2020-05-28 6:41 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-28 6:40 [RFC PATCH v5 00/13] riscv: Add vector ISA support Greentime Hu
2020-05-28 6:40 ` [RFC PATCH v5 01/13] ptrace: Use regset_size() for dynamic regset Greentime Hu
2020-05-28 12:36 ` Oleg Nesterov
2020-05-28 6:40 ` Greentime Hu [this message]
2020-05-28 6:40 ` [RFC PATCH v5 03/13] riscv: Rename __switch_to_aux -> fpu Greentime Hu
2020-05-28 6:40 ` [RFC PATCH v5 04/13] riscv: Extending cpufeature.c to detect V-extension Greentime Hu
2020-05-28 6:40 ` [RFC PATCH v5 05/13] riscv: Add new csr defines related to vector extension Greentime Hu
2020-05-28 6:40 ` [RFC PATCH v5 06/13] riscv: Add vector feature to compile Greentime Hu
2020-05-28 6:40 ` [RFC PATCH v5 07/13] riscv: Add has_vector/riscv_vsize to save vector features Greentime Hu
2020-05-28 6:40 ` [RFC PATCH v5 08/13] riscv: Reset vector register Greentime Hu
2020-05-28 6:40 ` [RFC PATCH v5 09/13] riscv: Add vector struct and assembler definitions Greentime Hu
2020-05-28 6:40 ` [RFC PATCH v5 10/13] riscv: Add task switch support for vector Greentime Hu
2020-05-28 6:40 ` [RFC PATCH v5 11/13] riscv: Add ptrace vector support Greentime Hu
2020-05-28 6:41 ` [RFC PATCH v5 12/13] riscv: Add sigcontext save/restore for vector Greentime Hu
2020-05-28 6:41 ` [RFC PATCH v5 13/13] riscv: signal: Report signal frame size to userspace via auxv Greentime Hu
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